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[efi] Remove obsolete EFI I/O implementation using EFI_CPU_IO_PROTOCOL

Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown 2013-04-18 16:50:13 +01:00
parent cdca99f068
commit 0f7b3fa6f9
5 changed files with 0 additions and 591 deletions

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@ -1,48 +0,0 @@
/** @file
This code abstracts the CPU IO Protocol which installed by some platform or chipset-specific
PEIM that abstracts the processor-visible I/O operations.
Note: This is a runtime protocol and can be used by runtime drivers after ExitBootServices().
It is different from the PI 1.2 CPU I/O 2 Protocol, which is a boot services only protocol
and may not be used by runtime drivers after ExitBootServices().
Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Revision Reference:
CPU IO Protocol is defined in Framework of EFI CPU IO Protocol Spec
Version 0.9.
**/
#ifndef _CPUIO_H_
#define _CPUIO_H_
FILE_LICENCE ( BSD3 );
#include <ipxe/efi/Protocol/CpuIo2.h>
#define EFI_CPU_IO_PROTOCOL_GUID \
{ \
0xB0732526, 0x38C8, 0x4b40, {0x88, 0x77, 0x61, 0xC7, 0xB0, 0x6A, 0xAC, 0x45 } \
}
//
// Framework CPU IO protocol structure is the same as CPU IO 2 protocol defined in PI 1.2 spec.
// However, there is a significant different between the Framework CPU I/O
// Protocol and the PI 1.2 CPU I/O 2 Protocol. The Framework one is a runtime
// protocol, which means it can be used by runtime drivers after ExitBootServices().
// The PI one is not runtime safe, so it is a boot services only protocol and may
// not be used by runtime drivers after ExitBootServices().
//
typedef EFI_CPU_IO2_PROTOCOL EFI_CPU_IO_PROTOCOL;
extern EFI_GUID gEfiCpuIoProtocolGuid;
#endif

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/** @file
This files describes the CPU I/O 2 Protocol.
This protocol provides an I/O abstraction for a system processor. This protocol
is used by a PCI root bridge I/O driver to perform memory-mapped I/O and I/O transactions.
The I/O or memory primitives can be used by the consumer of the protocol to materialize
bus-specific configuration cycles, such as the transitional configuration address and data
ports for PCI. Only drivers that require direct access to the entire system should use this
protocol.
Note: This is a boot-services only protocol and it may not be used by runtime drivers after
ExitBootServices(). It is different from the Framework CPU I/O Protocol, which is a runtime
protocol and can be used by runtime drivers after ExitBootServices().
Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Revision Reference:
This Protocol is defined in UEFI Platform Initialization Specification 1.2
Volume 5: Standards
**/
#ifndef __CPU_IO2_H__
#define __CPU_IO2_H__
FILE_LICENCE ( BSD3 );
#define EFI_CPU_IO2_PROTOCOL_GUID \
{ \
0xad61f191, 0xae5f, 0x4c0e, {0xb9, 0xfa, 0xe8, 0x69, 0xd2, 0x88, 0xc6, 0x4f} \
}
typedef struct _EFI_CPU_IO2_PROTOCOL EFI_CPU_IO2_PROTOCOL;
///
/// Enumeration that defines the width of the I/O operation.
///
typedef enum {
EfiCpuIoWidthUint8,
EfiCpuIoWidthUint16,
EfiCpuIoWidthUint32,
EfiCpuIoWidthUint64,
EfiCpuIoWidthFifoUint8,
EfiCpuIoWidthFifoUint16,
EfiCpuIoWidthFifoUint32,
EfiCpuIoWidthFifoUint64,
EfiCpuIoWidthFillUint8,
EfiCpuIoWidthFillUint16,
EfiCpuIoWidthFillUint32,
EfiCpuIoWidthFillUint64,
EfiCpuIoWidthMaximum
} EFI_CPU_IO_PROTOCOL_WIDTH;
/**
Enables a driver to access registers in the PI CPU I/O space.
The Io.Read() and Io.Write() functions enable a driver to access PCI controller
registers in the PI CPU I/O space.
The I/O operations are carried out exactly as requested. The caller is responsible
for satisfying any alignment and I/O width restrictions that a PI System on a
platform might require. For example on some platforms, width requests of
EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
be handled by the driver.
If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
each of the Count operations that is performed.
If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
incremented for each of the Count operations that is performed. The read or
write operation is performed Count times on the same Address.
If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
incremented for each of the Count operations that is performed. The read or
write operation is performed Count times from the first element of Buffer.
@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
@param[in] Width Signifies the width of the I/O or Memory operation.
@param[in] Address The base address of the I/O operation.
@param[in] Count The number of I/O operations to perform. The number
of bytes moved is Width size * Count, starting at Address.
@param[in, out] Buffer For read operations, the destination buffer to store the results.
For write operations, the source buffer from which to write data.
@retval EFI_SUCCESS The data was read from or written to the PI system.
@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
@retval EFI_INVALID_PARAMETER Buffer is NULL.
@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
@retval EFI_UNSUPPORTED The address range specified by Address, Width,
and Count is not valid for this PI system.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_CPU_IO_PROTOCOL_IO_MEM)(
IN EFI_CPU_IO2_PROTOCOL *This,
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
IN UINT64 Address,
IN UINTN Count,
IN OUT VOID *Buffer
);
///
/// Service for read and write accesses.
///
typedef struct {
///
/// This service provides the various modalities of memory and I/O read.
///
EFI_CPU_IO_PROTOCOL_IO_MEM Read;
///
/// This service provides the various modalities of memory and I/O write.
///
EFI_CPU_IO_PROTOCOL_IO_MEM Write;
} EFI_CPU_IO_PROTOCOL_ACCESS;
///
/// Provides the basic memory and I/O interfaces that are used to abstract
/// accesses to devices in a system.
///
struct _EFI_CPU_IO2_PROTOCOL {
///
/// Enables a driver to access memory-mapped registers in the EFI system memory space.
///
EFI_CPU_IO_PROTOCOL_ACCESS Mem;
///
/// Enables a driver to access registers in the EFI CPU I/O space.
///
EFI_CPU_IO_PROTOCOL_ACCESS Io;
};
extern EFI_GUID gEfiCpuIo2ProtocolGuid;
#endif

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#ifndef _IPXE_EFI_IO_H
#define _IPXE_EFI_IO_H
/** @file
*
* iPXE I/O API for EFI
*
* EFI runs with flat physical addressing, so the various mappings
* between virtual addresses, I/O addresses and bus addresses are all
* no-ops. I/O is handled using the EFI_CPU_IO_PROTOCOL.
*/
FILE_LICENCE ( GPL2_OR_LATER );
#ifdef IOAPI_EFI
#define IOAPI_PREFIX_efi
#else
#define IOAPI_PREFIX_efi __efi_
#endif
extern unsigned long long efi_ioread ( volatile void *io_addr,
size_t size );
extern void efi_iowrite ( unsigned long long data, volatile void *io_addr,
size_t size );
extern void efi_ioreads ( volatile void *io_addr, void *data,
size_t size, unsigned int count );
extern void efi_iowrites ( volatile void *io_addr, const void *data,
size_t size, unsigned int count );
/*
* Physical<->Bus and Bus<->I/O address mappings
*
* EFI runs with flat physical addressing, so these are all no-ops.
*
*/
static inline __always_inline unsigned long
IOAPI_INLINE ( efi, phys_to_bus ) ( unsigned long phys_addr ) {
return phys_addr;
}
static inline __always_inline unsigned long
IOAPI_INLINE ( efi, bus_to_phys ) ( unsigned long bus_addr ) {
return bus_addr;
}
static inline __always_inline void *
IOAPI_INLINE ( efi, ioremap ) ( unsigned long bus_addr, size_t len __unused ) {
return ( ( void * ) bus_addr );
}
static inline __always_inline void
IOAPI_INLINE ( efi, iounmap ) ( volatile const void *io_addr __unused ) {
/* Nothing to do */
}
static inline __always_inline unsigned long
IOAPI_INLINE ( efi, io_to_bus ) ( volatile const void *io_addr ) {
return ( ( unsigned long ) io_addr );
}
/*
* I/O functions
*
*/
static inline __always_inline uint8_t
IOAPI_INLINE ( efi, readb ) ( volatile uint8_t *io_addr ) {
return efi_ioread ( io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline uint16_t
IOAPI_INLINE ( efi, readw ) ( volatile uint16_t *io_addr ) {
return efi_ioread ( io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline uint32_t
IOAPI_INLINE ( efi, readl ) ( volatile uint32_t *io_addr ) {
return efi_ioread ( io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline uint64_t
IOAPI_INLINE ( efi, readq ) ( volatile uint64_t *io_addr ) {
return efi_ioread ( io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline void
IOAPI_INLINE ( efi, writeb ) ( uint8_t data, volatile uint8_t *io_addr ) {
efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline void
IOAPI_INLINE ( efi, writew ) ( uint16_t data, volatile uint16_t *io_addr ) {
efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline void
IOAPI_INLINE ( efi, writel ) ( uint32_t data, volatile uint32_t *io_addr ) {
efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline void
IOAPI_INLINE ( efi, writeq ) ( uint64_t data, volatile uint64_t *io_addr ) {
efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline uint8_t
IOAPI_INLINE ( efi, inb ) ( volatile uint8_t *io_addr ) {
return efi_ioread ( io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline uint16_t
IOAPI_INLINE ( efi, inw ) ( volatile uint16_t *io_addr ) {
return efi_ioread ( io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline uint32_t
IOAPI_INLINE ( efi, inl ) ( volatile uint32_t *io_addr ) {
return efi_ioread ( io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline void
IOAPI_INLINE ( efi, outb ) ( uint8_t data, volatile uint8_t *io_addr ) {
efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline void
IOAPI_INLINE ( efi, outw ) ( uint16_t data, volatile uint16_t *io_addr ) {
efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline void
IOAPI_INLINE ( efi, outl ) ( uint32_t data, volatile uint32_t *io_addr ) {
efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
}
static inline __always_inline void
IOAPI_INLINE ( efi, insb ) ( volatile uint8_t *io_addr, uint8_t *data,
unsigned int count ) {
efi_ioreads ( io_addr, data, sizeof ( *io_addr ), count );
}
static inline __always_inline void
IOAPI_INLINE ( efi, insw ) ( volatile uint16_t *io_addr, uint16_t *data,
unsigned int count ) {
efi_ioreads ( io_addr, data, sizeof ( *io_addr ), count );
}
static inline __always_inline void
IOAPI_INLINE ( efi, insl ) ( volatile uint32_t *io_addr, uint32_t *data,
unsigned int count ) {
efi_ioreads ( io_addr, data, sizeof ( *io_addr ), count );
}
static inline __always_inline void
IOAPI_INLINE ( efi, outsb ) ( volatile uint8_t *io_addr, const uint8_t *data,
unsigned int count ) {
efi_iowrites ( io_addr, data, sizeof ( *io_addr ), count );
}
static inline __always_inline void
IOAPI_INLINE ( efi, outsw ) ( volatile uint16_t *io_addr, const uint16_t *data,
unsigned int count ) {
efi_iowrites ( io_addr, data, sizeof ( *io_addr ), count );
}
static inline __always_inline void
IOAPI_INLINE ( efi, outsl ) ( volatile uint32_t *io_addr, const uint32_t *data,
unsigned int count ) {
efi_iowrites ( io_addr, data, sizeof ( *io_addr ), count );
}
static inline __always_inline void
IOAPI_INLINE ( efi, mb ) ( void ) {
/* Do nothing; EFI readl()/writel() calls already act as
* memory barriers.
*/
}
#endif /* _IPXE_EFI_IO_H */

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@ -53,7 +53,6 @@ FILE_LICENCE ( GPL2_OR_LATER );
PROVIDE_SINGLE_API_INLINE ( IOAPI_PREFIX_ ## _subsys, _api_func )
/* Include all architecture-independent I/O API headers */
#include <ipxe/efi/efi_io.h>
/* Include all architecture-dependent I/O API headers */
#include <bits/io.h>

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/*
* Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
FILE_LICENCE ( GPL2_OR_LATER );
#include <assert.h>
#include <ipxe/io.h>
#include <ipxe/efi/efi.h>
#include <ipxe/efi/Protocol/CpuIo.h>
#include <ipxe/efi/efi_io.h>
/** @file
*
* iPXE I/O API for EFI
*
*/
/** CPU I/O protocol */
static EFI_CPU_IO_PROTOCOL *cpu_io;
EFI_REQUIRE_PROTOCOL ( EFI_CPU_IO_PROTOCOL, &cpu_io );
/** Maximum address that can be used for port I/O */
#define MAX_PORT_ADDRESS 0xffff
/**
* Determine whether or not address is a port I/O address
*
* @v io_addr I/O address
* @v is_port I/O address is a port I/O address
*/
#define IS_PORT_ADDRESS(io_addr) \
( ( ( intptr_t ) (io_addr) ) <= MAX_PORT_ADDRESS )
/**
* Determine EFI CPU I/O width code
*
* @v size Size of value
* @ret width EFI width code
*
* Someone at Intel clearly gets paid by the number of lines of code
* they write. No-one should ever be able to make I/O this
* convoluted. The EFI_CPU_IO_PROTOCOL_WIDTH enum is my favourite
* idiocy.
*/
static EFI_CPU_IO_PROTOCOL_WIDTH efi_width ( size_t size ) {
switch ( size ) {
case 1 : return EfiCpuIoWidthFifoUint8;
case 2 : return EfiCpuIoWidthFifoUint16;
case 4 : return EfiCpuIoWidthFifoUint32;
case 8 : return EfiCpuIoWidthFifoUint64;
default :
assert ( 0 );
/* I wonder what this will actually do... */
return EfiCpuIoWidthMaximum;
}
}
/**
* Read from device
*
* @v io_addr I/O address
* @v size Size of value
* @ret data Value read
*/
unsigned long long efi_ioread ( volatile void *io_addr, size_t size ) {
EFI_CPU_IO_PROTOCOL_IO_MEM read;
unsigned long long data = 0;
EFI_STATUS efirc;
read = ( IS_PORT_ADDRESS ( io_addr ) ?
cpu_io->Io.Read : cpu_io->Mem.Read );
if ( ( efirc = read ( cpu_io, efi_width ( size ),
( intptr_t ) io_addr, 1,
( void * ) &data ) ) != 0 ) {
DBG ( "EFI I/O read at %p failed: %s\n",
io_addr, efi_strerror ( efirc ) );
return -1ULL;
}
return data;
}
/**
* Write to device
*
* @v data Value to write
* @v io_addr I/O address
* @v size Size of value
*/
void efi_iowrite ( unsigned long long data, volatile void *io_addr,
size_t size ) {
EFI_CPU_IO_PROTOCOL_IO_MEM write;
EFI_STATUS efirc;
write = ( IS_PORT_ADDRESS ( io_addr ) ?
cpu_io->Io.Write : cpu_io->Mem.Write );
if ( ( efirc = write ( cpu_io, efi_width ( size ),
( intptr_t ) io_addr, 1,
( void * ) &data ) ) != 0 ) {
DBG ( "EFI I/O write at %p failed: %s\n",
io_addr, efi_strerror ( efirc ) );
}
}
/**
* String read from device
*
* @v io_addr I/O address
* @v data Data buffer
* @v size Size of values
* @v count Number of values to read
*/
void efi_ioreads ( volatile void *io_addr, void *data,
size_t size, unsigned int count ) {
EFI_CPU_IO_PROTOCOL_IO_MEM read;
EFI_STATUS efirc;
read = ( IS_PORT_ADDRESS ( io_addr ) ?
cpu_io->Io.Read : cpu_io->Mem.Read );
if ( ( efirc = read ( cpu_io, efi_width ( size ),
( intptr_t ) io_addr, count,
( void * ) data ) ) != 0 ) {
DBG ( "EFI I/O string read at %p failed: %s\n",
io_addr, efi_strerror ( efirc ) );
}
}
/**
* String write to device
*
* @v io_addr I/O address
* @v data Data buffer
* @v size Size of values
* @v count Number of values to write
*/
void efi_iowrites ( volatile void *io_addr, const void *data,
size_t size, unsigned int count ) {
EFI_CPU_IO_PROTOCOL_IO_MEM write;
EFI_STATUS efirc;
write = ( IS_PORT_ADDRESS ( io_addr ) ?
cpu_io->Io.Write : cpu_io->Mem.Write );
if ( ( efirc = write ( cpu_io, efi_width ( size ),
( intptr_t ) io_addr, count,
( void * ) data ) ) != 0 ) {
DBG ( "EFI I/O write at %p failed: %s\n",
io_addr, efi_strerror ( efirc ) );
}
}
/**
* Wait for I/O-mapped operation to complete
*
*/
static void efi_iodelay ( void ) {
/* Write to non-existent port. Probably x86-only. */
outb ( 0, 0x80 );
}
/**
* Get memory map
*
* Can't be done on EFI so return an empty map
*
* @v memmap Memory map to fill in
*/
static void efi_get_memmap ( struct memory_map *memmap ) {
memmap->count = 0;
}
PROVIDE_IOAPI_INLINE ( efi, phys_to_bus );
PROVIDE_IOAPI_INLINE ( efi, bus_to_phys );
PROVIDE_IOAPI_INLINE ( efi, ioremap );
PROVIDE_IOAPI_INLINE ( efi, iounmap );
PROVIDE_IOAPI_INLINE ( efi, io_to_bus );
PROVIDE_IOAPI_INLINE ( efi, readb );
PROVIDE_IOAPI_INLINE ( efi, readw );
PROVIDE_IOAPI_INLINE ( efi, readl );
PROVIDE_IOAPI_INLINE ( efi, readq );
PROVIDE_IOAPI_INLINE ( efi, writeb );
PROVIDE_IOAPI_INLINE ( efi, writew );
PROVIDE_IOAPI_INLINE ( efi, writel );
PROVIDE_IOAPI_INLINE ( efi, writeq );
PROVIDE_IOAPI_INLINE ( efi, inb );
PROVIDE_IOAPI_INLINE ( efi, inw );
PROVIDE_IOAPI_INLINE ( efi, inl );
PROVIDE_IOAPI_INLINE ( efi, outb );
PROVIDE_IOAPI_INLINE ( efi, outw );
PROVIDE_IOAPI_INLINE ( efi, outl );
PROVIDE_IOAPI_INLINE ( efi, insb );
PROVIDE_IOAPI_INLINE ( efi, insw );
PROVIDE_IOAPI_INLINE ( efi, insl );
PROVIDE_IOAPI_INLINE ( efi, outsb );
PROVIDE_IOAPI_INLINE ( efi, outsw );
PROVIDE_IOAPI_INLINE ( efi, outsl );
PROVIDE_IOAPI ( efi, iodelay, efi_iodelay );
PROVIDE_IOAPI_INLINE ( efi, mb );
PROVIDE_IOAPI ( efi, get_memmap, efi_get_memmap );