[efi] Remove obsolete EFI I/O implementation using EFI_CPU_IO_PROTOCOL
Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
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cdca99f068
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/** @file
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This code abstracts the CPU IO Protocol which installed by some platform or chipset-specific
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PEIM that abstracts the processor-visible I/O operations.
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Note: This is a runtime protocol and can be used by runtime drivers after ExitBootServices().
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It is different from the PI 1.2 CPU I/O 2 Protocol, which is a boot services only protocol
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and may not be used by runtime drivers after ExitBootServices().
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Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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CPU IO Protocol is defined in Framework of EFI CPU IO Protocol Spec
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Version 0.9.
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**/
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#ifndef _CPUIO_H_
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#define _CPUIO_H_
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FILE_LICENCE ( BSD3 );
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#include <ipxe/efi/Protocol/CpuIo2.h>
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#define EFI_CPU_IO_PROTOCOL_GUID \
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{ \
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0xB0732526, 0x38C8, 0x4b40, {0x88, 0x77, 0x61, 0xC7, 0xB0, 0x6A, 0xAC, 0x45 } \
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}
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//
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// Framework CPU IO protocol structure is the same as CPU IO 2 protocol defined in PI 1.2 spec.
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// However, there is a significant different between the Framework CPU I/O
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// Protocol and the PI 1.2 CPU I/O 2 Protocol. The Framework one is a runtime
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// protocol, which means it can be used by runtime drivers after ExitBootServices().
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// The PI one is not runtime safe, so it is a boot services only protocol and may
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// not be used by runtime drivers after ExitBootServices().
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//
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typedef EFI_CPU_IO2_PROTOCOL EFI_CPU_IO_PROTOCOL;
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extern EFI_GUID gEfiCpuIoProtocolGuid;
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#endif
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@ -1,144 +0,0 @@
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/** @file
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This files describes the CPU I/O 2 Protocol.
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This protocol provides an I/O abstraction for a system processor. This protocol
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is used by a PCI root bridge I/O driver to perform memory-mapped I/O and I/O transactions.
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The I/O or memory primitives can be used by the consumer of the protocol to materialize
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bus-specific configuration cycles, such as the transitional configuration address and data
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ports for PCI. Only drivers that require direct access to the entire system should use this
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protocol.
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Note: This is a boot-services only protocol and it may not be used by runtime drivers after
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ExitBootServices(). It is different from the Framework CPU I/O Protocol, which is a runtime
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protocol and can be used by runtime drivers after ExitBootServices().
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Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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This Protocol is defined in UEFI Platform Initialization Specification 1.2
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Volume 5: Standards
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**/
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#ifndef __CPU_IO2_H__
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#define __CPU_IO2_H__
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FILE_LICENCE ( BSD3 );
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#define EFI_CPU_IO2_PROTOCOL_GUID \
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{ \
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0xad61f191, 0xae5f, 0x4c0e, {0xb9, 0xfa, 0xe8, 0x69, 0xd2, 0x88, 0xc6, 0x4f} \
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}
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typedef struct _EFI_CPU_IO2_PROTOCOL EFI_CPU_IO2_PROTOCOL;
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///
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/// Enumeration that defines the width of the I/O operation.
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///
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typedef enum {
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EfiCpuIoWidthUint8,
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EfiCpuIoWidthUint16,
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EfiCpuIoWidthUint32,
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EfiCpuIoWidthUint64,
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EfiCpuIoWidthFifoUint8,
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EfiCpuIoWidthFifoUint16,
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EfiCpuIoWidthFifoUint32,
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EfiCpuIoWidthFifoUint64,
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EfiCpuIoWidthFillUint8,
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EfiCpuIoWidthFillUint16,
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EfiCpuIoWidthFillUint32,
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EfiCpuIoWidthFillUint64,
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EfiCpuIoWidthMaximum
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} EFI_CPU_IO_PROTOCOL_WIDTH;
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/**
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Enables a driver to access registers in the PI CPU I/O space.
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The Io.Read() and Io.Write() functions enable a driver to access PCI controller
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registers in the PI CPU I/O space.
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The I/O operations are carried out exactly as requested. The caller is responsible
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for satisfying any alignment and I/O width restrictions that a PI System on a
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platform might require. For example on some platforms, width requests of
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EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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each of the Count operations that is performed.
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If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times on the same Address.
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If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times from the first element of Buffer.
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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@param[in] Address The base address of the I/O operation.
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@param[in] Count The number of I/O operations to perform. The number
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of bytes moved is Width size * Count, starting at Address.
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@param[in, out] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@retval EFI_SUCCESS The data was read from or written to the PI system.
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_CPU_IO_PROTOCOL_IO_MEM)(
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IN EFI_CPU_IO2_PROTOCOL *This,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN OUT VOID *Buffer
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);
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///
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/// Service for read and write accesses.
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///
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typedef struct {
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///
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/// This service provides the various modalities of memory and I/O read.
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///
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EFI_CPU_IO_PROTOCOL_IO_MEM Read;
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///
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/// This service provides the various modalities of memory and I/O write.
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///
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EFI_CPU_IO_PROTOCOL_IO_MEM Write;
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} EFI_CPU_IO_PROTOCOL_ACCESS;
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///
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/// Provides the basic memory and I/O interfaces that are used to abstract
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/// accesses to devices in a system.
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///
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struct _EFI_CPU_IO2_PROTOCOL {
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///
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/// Enables a driver to access memory-mapped registers in the EFI system memory space.
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///
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EFI_CPU_IO_PROTOCOL_ACCESS Mem;
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///
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/// Enables a driver to access registers in the EFI CPU I/O space.
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///
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EFI_CPU_IO_PROTOCOL_ACCESS Io;
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};
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extern EFI_GUID gEfiCpuIo2ProtocolGuid;
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#endif
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#ifndef _IPXE_EFI_IO_H
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#define _IPXE_EFI_IO_H
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/** @file
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*
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* iPXE I/O API for EFI
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*
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* EFI runs with flat physical addressing, so the various mappings
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* between virtual addresses, I/O addresses and bus addresses are all
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* no-ops. I/O is handled using the EFI_CPU_IO_PROTOCOL.
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*/
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FILE_LICENCE ( GPL2_OR_LATER );
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#ifdef IOAPI_EFI
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#define IOAPI_PREFIX_efi
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#else
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#define IOAPI_PREFIX_efi __efi_
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#endif
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extern unsigned long long efi_ioread ( volatile void *io_addr,
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size_t size );
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extern void efi_iowrite ( unsigned long long data, volatile void *io_addr,
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size_t size );
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extern void efi_ioreads ( volatile void *io_addr, void *data,
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size_t size, unsigned int count );
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extern void efi_iowrites ( volatile void *io_addr, const void *data,
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size_t size, unsigned int count );
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/*
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* Physical<->Bus and Bus<->I/O address mappings
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*
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* EFI runs with flat physical addressing, so these are all no-ops.
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*
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*/
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static inline __always_inline unsigned long
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IOAPI_INLINE ( efi, phys_to_bus ) ( unsigned long phys_addr ) {
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return phys_addr;
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}
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static inline __always_inline unsigned long
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IOAPI_INLINE ( efi, bus_to_phys ) ( unsigned long bus_addr ) {
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return bus_addr;
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}
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static inline __always_inline void *
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IOAPI_INLINE ( efi, ioremap ) ( unsigned long bus_addr, size_t len __unused ) {
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return ( ( void * ) bus_addr );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, iounmap ) ( volatile const void *io_addr __unused ) {
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/* Nothing to do */
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}
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static inline __always_inline unsigned long
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IOAPI_INLINE ( efi, io_to_bus ) ( volatile const void *io_addr ) {
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return ( ( unsigned long ) io_addr );
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}
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/*
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* I/O functions
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*
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*/
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static inline __always_inline uint8_t
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IOAPI_INLINE ( efi, readb ) ( volatile uint8_t *io_addr ) {
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return efi_ioread ( io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline uint16_t
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IOAPI_INLINE ( efi, readw ) ( volatile uint16_t *io_addr ) {
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return efi_ioread ( io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline uint32_t
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IOAPI_INLINE ( efi, readl ) ( volatile uint32_t *io_addr ) {
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return efi_ioread ( io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline uint64_t
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IOAPI_INLINE ( efi, readq ) ( volatile uint64_t *io_addr ) {
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return efi_ioread ( io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, writeb ) ( uint8_t data, volatile uint8_t *io_addr ) {
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efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, writew ) ( uint16_t data, volatile uint16_t *io_addr ) {
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efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, writel ) ( uint32_t data, volatile uint32_t *io_addr ) {
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efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, writeq ) ( uint64_t data, volatile uint64_t *io_addr ) {
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efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline uint8_t
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IOAPI_INLINE ( efi, inb ) ( volatile uint8_t *io_addr ) {
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return efi_ioread ( io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline uint16_t
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IOAPI_INLINE ( efi, inw ) ( volatile uint16_t *io_addr ) {
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return efi_ioread ( io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline uint32_t
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IOAPI_INLINE ( efi, inl ) ( volatile uint32_t *io_addr ) {
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return efi_ioread ( io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, outb ) ( uint8_t data, volatile uint8_t *io_addr ) {
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efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, outw ) ( uint16_t data, volatile uint16_t *io_addr ) {
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efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, outl ) ( uint32_t data, volatile uint32_t *io_addr ) {
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efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, insb ) ( volatile uint8_t *io_addr, uint8_t *data,
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unsigned int count ) {
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efi_ioreads ( io_addr, data, sizeof ( *io_addr ), count );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, insw ) ( volatile uint16_t *io_addr, uint16_t *data,
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unsigned int count ) {
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efi_ioreads ( io_addr, data, sizeof ( *io_addr ), count );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, insl ) ( volatile uint32_t *io_addr, uint32_t *data,
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unsigned int count ) {
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efi_ioreads ( io_addr, data, sizeof ( *io_addr ), count );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, outsb ) ( volatile uint8_t *io_addr, const uint8_t *data,
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unsigned int count ) {
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efi_iowrites ( io_addr, data, sizeof ( *io_addr ), count );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, outsw ) ( volatile uint16_t *io_addr, const uint16_t *data,
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unsigned int count ) {
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efi_iowrites ( io_addr, data, sizeof ( *io_addr ), count );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, outsl ) ( volatile uint32_t *io_addr, const uint32_t *data,
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unsigned int count ) {
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efi_iowrites ( io_addr, data, sizeof ( *io_addr ), count );
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}
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static inline __always_inline void
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IOAPI_INLINE ( efi, mb ) ( void ) {
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/* Do nothing; EFI readl()/writel() calls already act as
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* memory barriers.
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*/
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}
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#endif /* _IPXE_EFI_IO_H */
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@ -53,7 +53,6 @@ FILE_LICENCE ( GPL2_OR_LATER );
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PROVIDE_SINGLE_API_INLINE ( IOAPI_PREFIX_ ## _subsys, _api_func )
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/* Include all architecture-independent I/O API headers */
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#include <ipxe/efi/efi_io.h>
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/* Include all architecture-dependent I/O API headers */
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#include <bits/io.h>
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@ -1,218 +0,0 @@
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/*
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* Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
|
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* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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FILE_LICENCE ( GPL2_OR_LATER );
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#include <assert.h>
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#include <ipxe/io.h>
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#include <ipxe/efi/efi.h>
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#include <ipxe/efi/Protocol/CpuIo.h>
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#include <ipxe/efi/efi_io.h>
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/** @file
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*
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* iPXE I/O API for EFI
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*
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*/
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/** CPU I/O protocol */
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static EFI_CPU_IO_PROTOCOL *cpu_io;
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EFI_REQUIRE_PROTOCOL ( EFI_CPU_IO_PROTOCOL, &cpu_io );
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/** Maximum address that can be used for port I/O */
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#define MAX_PORT_ADDRESS 0xffff
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/**
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* Determine whether or not address is a port I/O address
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*
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* @v io_addr I/O address
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* @v is_port I/O address is a port I/O address
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*/
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#define IS_PORT_ADDRESS(io_addr) \
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( ( ( intptr_t ) (io_addr) ) <= MAX_PORT_ADDRESS )
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/**
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* Determine EFI CPU I/O width code
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*
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* @v size Size of value
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* @ret width EFI width code
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*
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* Someone at Intel clearly gets paid by the number of lines of code
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* they write. No-one should ever be able to make I/O this
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* convoluted. The EFI_CPU_IO_PROTOCOL_WIDTH enum is my favourite
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||||
* idiocy.
|
||||
*/
|
||||
static EFI_CPU_IO_PROTOCOL_WIDTH efi_width ( size_t size ) {
|
||||
switch ( size ) {
|
||||
case 1 : return EfiCpuIoWidthFifoUint8;
|
||||
case 2 : return EfiCpuIoWidthFifoUint16;
|
||||
case 4 : return EfiCpuIoWidthFifoUint32;
|
||||
case 8 : return EfiCpuIoWidthFifoUint64;
|
||||
default :
|
||||
assert ( 0 );
|
||||
/* I wonder what this will actually do... */
|
||||
return EfiCpuIoWidthMaximum;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Read from device
|
||||
*
|
||||
* @v io_addr I/O address
|
||||
* @v size Size of value
|
||||
* @ret data Value read
|
||||
*/
|
||||
unsigned long long efi_ioread ( volatile void *io_addr, size_t size ) {
|
||||
EFI_CPU_IO_PROTOCOL_IO_MEM read;
|
||||
unsigned long long data = 0;
|
||||
EFI_STATUS efirc;
|
||||
|
||||
read = ( IS_PORT_ADDRESS ( io_addr ) ?
|
||||
cpu_io->Io.Read : cpu_io->Mem.Read );
|
||||
|
||||
if ( ( efirc = read ( cpu_io, efi_width ( size ),
|
||||
( intptr_t ) io_addr, 1,
|
||||
( void * ) &data ) ) != 0 ) {
|
||||
DBG ( "EFI I/O read at %p failed: %s\n",
|
||||
io_addr, efi_strerror ( efirc ) );
|
||||
return -1ULL;
|
||||
}
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
/**
|
||||
* Write to device
|
||||
*
|
||||
* @v data Value to write
|
||||
* @v io_addr I/O address
|
||||
* @v size Size of value
|
||||
*/
|
||||
void efi_iowrite ( unsigned long long data, volatile void *io_addr,
|
||||
size_t size ) {
|
||||
EFI_CPU_IO_PROTOCOL_IO_MEM write;
|
||||
EFI_STATUS efirc;
|
||||
|
||||
write = ( IS_PORT_ADDRESS ( io_addr ) ?
|
||||
cpu_io->Io.Write : cpu_io->Mem.Write );
|
||||
|
||||
if ( ( efirc = write ( cpu_io, efi_width ( size ),
|
||||
( intptr_t ) io_addr, 1,
|
||||
( void * ) &data ) ) != 0 ) {
|
||||
DBG ( "EFI I/O write at %p failed: %s\n",
|
||||
io_addr, efi_strerror ( efirc ) );
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* String read from device
|
||||
*
|
||||
* @v io_addr I/O address
|
||||
* @v data Data buffer
|
||||
* @v size Size of values
|
||||
* @v count Number of values to read
|
||||
*/
|
||||
void efi_ioreads ( volatile void *io_addr, void *data,
|
||||
size_t size, unsigned int count ) {
|
||||
EFI_CPU_IO_PROTOCOL_IO_MEM read;
|
||||
EFI_STATUS efirc;
|
||||
|
||||
read = ( IS_PORT_ADDRESS ( io_addr ) ?
|
||||
cpu_io->Io.Read : cpu_io->Mem.Read );
|
||||
|
||||
if ( ( efirc = read ( cpu_io, efi_width ( size ),
|
||||
( intptr_t ) io_addr, count,
|
||||
( void * ) data ) ) != 0 ) {
|
||||
DBG ( "EFI I/O string read at %p failed: %s\n",
|
||||
io_addr, efi_strerror ( efirc ) );
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* String write to device
|
||||
*
|
||||
* @v io_addr I/O address
|
||||
* @v data Data buffer
|
||||
* @v size Size of values
|
||||
* @v count Number of values to write
|
||||
*/
|
||||
void efi_iowrites ( volatile void *io_addr, const void *data,
|
||||
size_t size, unsigned int count ) {
|
||||
EFI_CPU_IO_PROTOCOL_IO_MEM write;
|
||||
EFI_STATUS efirc;
|
||||
|
||||
write = ( IS_PORT_ADDRESS ( io_addr ) ?
|
||||
cpu_io->Io.Write : cpu_io->Mem.Write );
|
||||
|
||||
if ( ( efirc = write ( cpu_io, efi_width ( size ),
|
||||
( intptr_t ) io_addr, count,
|
||||
( void * ) data ) ) != 0 ) {
|
||||
DBG ( "EFI I/O write at %p failed: %s\n",
|
||||
io_addr, efi_strerror ( efirc ) );
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Wait for I/O-mapped operation to complete
|
||||
*
|
||||
*/
|
||||
static void efi_iodelay ( void ) {
|
||||
/* Write to non-existent port. Probably x86-only. */
|
||||
outb ( 0, 0x80 );
|
||||
}
|
||||
|
||||
/**
|
||||
* Get memory map
|
||||
*
|
||||
* Can't be done on EFI so return an empty map
|
||||
*
|
||||
* @v memmap Memory map to fill in
|
||||
*/
|
||||
static void efi_get_memmap ( struct memory_map *memmap ) {
|
||||
memmap->count = 0;
|
||||
}
|
||||
|
||||
PROVIDE_IOAPI_INLINE ( efi, phys_to_bus );
|
||||
PROVIDE_IOAPI_INLINE ( efi, bus_to_phys );
|
||||
PROVIDE_IOAPI_INLINE ( efi, ioremap );
|
||||
PROVIDE_IOAPI_INLINE ( efi, iounmap );
|
||||
PROVIDE_IOAPI_INLINE ( efi, io_to_bus );
|
||||
PROVIDE_IOAPI_INLINE ( efi, readb );
|
||||
PROVIDE_IOAPI_INLINE ( efi, readw );
|
||||
PROVIDE_IOAPI_INLINE ( efi, readl );
|
||||
PROVIDE_IOAPI_INLINE ( efi, readq );
|
||||
PROVIDE_IOAPI_INLINE ( efi, writeb );
|
||||
PROVIDE_IOAPI_INLINE ( efi, writew );
|
||||
PROVIDE_IOAPI_INLINE ( efi, writel );
|
||||
PROVIDE_IOAPI_INLINE ( efi, writeq );
|
||||
PROVIDE_IOAPI_INLINE ( efi, inb );
|
||||
PROVIDE_IOAPI_INLINE ( efi, inw );
|
||||
PROVIDE_IOAPI_INLINE ( efi, inl );
|
||||
PROVIDE_IOAPI_INLINE ( efi, outb );
|
||||
PROVIDE_IOAPI_INLINE ( efi, outw );
|
||||
PROVIDE_IOAPI_INLINE ( efi, outl );
|
||||
PROVIDE_IOAPI_INLINE ( efi, insb );
|
||||
PROVIDE_IOAPI_INLINE ( efi, insw );
|
||||
PROVIDE_IOAPI_INLINE ( efi, insl );
|
||||
PROVIDE_IOAPI_INLINE ( efi, outsb );
|
||||
PROVIDE_IOAPI_INLINE ( efi, outsw );
|
||||
PROVIDE_IOAPI_INLINE ( efi, outsl );
|
||||
PROVIDE_IOAPI ( efi, iodelay, efi_iodelay );
|
||||
PROVIDE_IOAPI_INLINE ( efi, mb );
|
||||
PROVIDE_IOAPI ( efi, get_memmap, efi_get_memmap );
|
Reference in New Issue