![Michael Brown](/assets/img/avatar_default.png)
Add FILE_LICENCE declarations to almost all files that make up the various standard builds of gPXE.
740 lines
20 KiB
C
740 lines
20 KiB
C
#ifdef ALLMULTI
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#error multicast support is not yet implemented
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#endif
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/**
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Per an email message from Russ Nelson <nelson@crynwr.com> on
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18 March 2008 this file is now licensed under GPL Version 2.
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From: Russ Nelson <nelson@crynwr.com>
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Date: Tue, 18 Mar 2008 12:42:00 -0400
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Subject: Re: [Etherboot-developers] cs89x0 driver in etherboot
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-- quote from email
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As copyright holder, if I say it doesn't conflict with the GPL,
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then it doesn't conflict with the GPL.
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However, there's no point in causing people's brains to overheat,
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so yes, I grant permission for the code to be relicensed under the
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GPLv2. Please make sure that this change in licensing makes its
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way upstream. -russ
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-- quote from email
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**/
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FILE_LICENCE ( GPL2_ONLY );
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/* cs89x0.c: A Crystal Semiconductor CS89[02]0 driver for etherboot. */
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/*
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Permission is granted to distribute the enclosed cs89x0.[ch] driver
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only in conjunction with the Etherboot package. The code is
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ordinarily distributed under the GPL.
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Russ Nelson, January 2000
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ChangeLog:
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Thu Dec 6 22:40:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
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* disabled all "advanced" features; this should make the code more reliable
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* reorganized the reset function
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* always reset the address port, so that autoprobing will continue working
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* some cosmetic changes
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* 2.5
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Thu Dec 5 21:00:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
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* tested the code against a CS8900 card
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* lots of minor bug fixes and adjustments
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* this is the first release, that actually works! it still requires some
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changes in order to be more tolerant to different environments
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* 4
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Fri Nov 22 23:00:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
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* read the manuals for the CS89x0 chipsets and took note of all the
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changes that will be neccessary in order to adapt Russel Nelson's code
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to the requirements of a BOOT-Prom
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* 6
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Thu Nov 19 22:00:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
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* Synched with Russel Nelson's current code (v1.00)
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* 2
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Thu Nov 12 18:00:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
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* Cleaned up some of the code and tried to optimize the code size.
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* 1.5
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Sun Nov 10 16:30:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
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* First experimental release. This code compiles fine, but I
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have no way of testing whether it actually works.
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* I did not (yet) bother to make the code 16bit aware, so for
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the time being, it will only work for Etherboot/32.
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* 12
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*/
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#include <errno.h>
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#include <gpxe/ethernet.h>
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#include "etherboot.h"
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#include "nic.h"
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#include <gpxe/isa.h>
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#include "console.h"
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#include "cs89x0.h"
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static unsigned short eth_nic_base;
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static unsigned long eth_mem_start;
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static unsigned short eth_irqno;
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static unsigned short eth_cs_type; /* one of: CS8900, CS8920, CS8920M */
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static unsigned short eth_auto_neg_cnf;
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static unsigned short eth_adapter_cnf;
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static unsigned short eth_linectl;
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/*************************************************************************
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CS89x0 - specific routines
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**************************************************************************/
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static inline int readreg(int portno)
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{
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outw(portno, eth_nic_base + ADD_PORT);
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return inw(eth_nic_base + DATA_PORT);
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}
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static inline void writereg(int portno, int value)
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{
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outw(portno, eth_nic_base + ADD_PORT);
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outw(value, eth_nic_base + DATA_PORT);
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return;
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}
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/*************************************************************************
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EEPROM access
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**************************************************************************/
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static int wait_eeprom_ready(void)
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{
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unsigned long tmo = currticks() + 4*TICKS_PER_SEC;
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/* check to see if the EEPROM is ready, a timeout is used -
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just in case EEPROM is ready when SI_BUSY in the
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PP_SelfST is clear */
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while(readreg(PP_SelfST) & SI_BUSY) {
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if (currticks() >= tmo)
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return -1; }
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return 0;
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}
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static int get_eeprom_data(int off, int len, unsigned short *buffer)
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{
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int i;
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#ifdef EDEBUG
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printf("\ncs: EEPROM data from %hX for %hX:",off,len);
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#endif
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for (i = 0; i < len; i++) {
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if (wait_eeprom_ready() < 0)
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return -1;
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/* Now send the EEPROM read command and EEPROM location
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to read */
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writereg(PP_EECMD, (off + i) | EEPROM_READ_CMD);
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if (wait_eeprom_ready() < 0)
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return -1;
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buffer[i] = readreg(PP_EEData);
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#ifdef EDEBUG
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if (!(i%10))
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printf("\ncs: ");
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printf("%hX ", buffer[i]);
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#endif
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}
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#ifdef EDEBUG
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putchar('\n');
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#endif
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return(0);
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}
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static int get_eeprom_chksum(int off __unused, int len, unsigned short *buffer)
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{
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int i, cksum;
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cksum = 0;
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for (i = 0; i < len; i++)
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cksum += buffer[i];
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cksum &= 0xffff;
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if (cksum == 0)
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return 0;
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return -1;
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}
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/*************************************************************************
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Activate all of the available media and probe for network
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**************************************************************************/
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static void clrline(void)
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{
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int i;
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putchar('\r');
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for (i = 79; i--; ) putchar(' ');
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printf("\rcs: ");
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return;
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}
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static void control_dc_dc(int on_not_off)
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{
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unsigned int selfcontrol;
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unsigned long tmo = currticks() + TICKS_PER_SEC;
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/* control the DC to DC convertor in the SelfControl register. */
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selfcontrol = HCB1_ENBL; /* Enable the HCB1 bit as an output */
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if (((eth_adapter_cnf & A_CNF_DC_DC_POLARITY) != 0) ^ on_not_off)
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selfcontrol |= HCB1;
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else
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selfcontrol &= ~HCB1;
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writereg(PP_SelfCTL, selfcontrol);
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/* Wait for the DC/DC converter to power up - 1000ms */
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while (currticks() < tmo);
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return;
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}
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static int detect_tp(void)
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{
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unsigned long tmo;
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/* Turn on the chip auto detection of 10BT/ AUI */
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clrline(); printf("attempting %s:","TP");
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/* If connected to another full duplex capable 10-Base-T card
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the link pulses seem to be lost when the auto detect bit in
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the LineCTL is set. To overcome this the auto detect bit
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will be cleared whilst testing the 10-Base-T interface.
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This would not be necessary for the sparrow chip but is
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simpler to do it anyway. */
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writereg(PP_LineCTL, eth_linectl &~ AUI_ONLY);
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control_dc_dc(0);
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/* Delay for the hardware to work out if the TP cable is
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present - 150ms */
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for (tmo = currticks() + 4; currticks() < tmo; );
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if ((readreg(PP_LineST) & LINK_OK) == 0)
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return 0;
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if (eth_cs_type != CS8900) {
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writereg(PP_AutoNegCTL, eth_auto_neg_cnf & AUTO_NEG_MASK);
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if ((eth_auto_neg_cnf & AUTO_NEG_BITS) == AUTO_NEG_ENABLE) {
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printf(" negotiating duplex... ");
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while (readreg(PP_AutoNegST) & AUTO_NEG_BUSY) {
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if (currticks() - tmo > 40*TICKS_PER_SEC) {
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printf("time out ");
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break;
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}
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}
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}
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if (readreg(PP_AutoNegST) & FDX_ACTIVE)
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printf("using full duplex");
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else
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printf("using half duplex");
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}
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return A_CNF_MEDIA_10B_T;
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}
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/* send a test packet - return true if carrier bits are ok */
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static int send_test_pkt(struct nic *nic)
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{
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static unsigned char testpacket[] = { 0,0,0,0,0,0, 0,0,0,0,0,0,
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0, 46, /*A 46 in network order */
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0, 0, /*DSAP=0 & SSAP=0 fields */
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0xf3,0 /*Control (Test Req+P bit set)*/ };
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unsigned long tmo;
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writereg(PP_LineCTL, readreg(PP_LineCTL) | SERIAL_TX_ON);
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memcpy(testpacket, nic->node_addr, ETH_ALEN);
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memcpy(testpacket+ETH_ALEN, nic->node_addr, ETH_ALEN);
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outw(TX_AFTER_ALL, eth_nic_base + TX_CMD_PORT);
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outw(ETH_ZLEN, eth_nic_base + TX_LEN_PORT);
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/* Test to see if the chip has allocated memory for the packet */
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for (tmo = currticks() + 2;
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(readreg(PP_BusST) & READY_FOR_TX_NOW) == 0; )
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if (currticks() >= tmo)
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return(0);
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/* Write the contents of the packet */
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outsw(eth_nic_base + TX_FRAME_PORT, testpacket,
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(ETH_ZLEN+1)>>1);
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printf(" sending test packet ");
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/* wait a couple of timer ticks for packet to be received */
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for (tmo = currticks() + 2; currticks() < tmo; );
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if ((readreg(PP_TxEvent) & TX_SEND_OK_BITS) == TX_OK) {
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printf("succeeded");
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return 1;
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}
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printf("failed");
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return 0;
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}
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static int detect_aui(struct nic *nic)
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{
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clrline(); printf("attempting %s:","AUI");
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control_dc_dc(0);
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writereg(PP_LineCTL, (eth_linectl & ~AUTO_AUI_10BASET) | AUI_ONLY);
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if (send_test_pkt(nic)) {
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return A_CNF_MEDIA_AUI; }
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else
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return 0;
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}
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static int detect_bnc(struct nic *nic)
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{
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clrline(); printf("attempting %s:","BNC");
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control_dc_dc(1);
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writereg(PP_LineCTL, (eth_linectl & ~AUTO_AUI_10BASET) | AUI_ONLY);
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if (send_test_pkt(nic)) {
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return A_CNF_MEDIA_10B_2; }
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else
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return 0;
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}
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/**************************************************************************
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ETH_RESET - Reset adapter
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***************************************************************************/
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static void cs89x0_reset(struct nic *nic)
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{
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int i;
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unsigned long reset_tmo;
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writereg(PP_SelfCTL, readreg(PP_SelfCTL) | POWER_ON_RESET);
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/* wait for two ticks; that is 2*55ms */
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for (reset_tmo = currticks() + 2; currticks() < reset_tmo; );
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if (eth_cs_type != CS8900) {
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/* Hardware problem requires PNP registers to be reconfigured
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after a reset */
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if (eth_irqno != 0xFFFF) {
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outw(PP_CS8920_ISAINT, eth_nic_base + ADD_PORT);
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outb(eth_irqno, eth_nic_base + DATA_PORT);
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outb(0, eth_nic_base + DATA_PORT + 1); }
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if (eth_mem_start) {
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outw(PP_CS8920_ISAMemB, eth_nic_base + ADD_PORT);
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outb((eth_mem_start >> 8) & 0xff, eth_nic_base + DATA_PORT);
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outb((eth_mem_start >> 24) & 0xff, eth_nic_base + DATA_PORT + 1); } }
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/* Wait until the chip is reset */
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for (reset_tmo = currticks() + 2;
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(readreg(PP_SelfST) & INIT_DONE) == 0 &&
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currticks() < reset_tmo; );
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/* disable interrupts and memory accesses */
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writereg(PP_BusCTL, 0);
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/* set the ethernet address */
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for (i=0; i < ETH_ALEN/2; i++)
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writereg(PP_IA+i*2,
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nic->node_addr[i*2] |
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(nic->node_addr[i*2+1] << 8));
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/* receive only error free packets addressed to this card */
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writereg(PP_RxCTL, DEF_RX_ACCEPT);
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/* do not generate any interrupts on receive operations */
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writereg(PP_RxCFG, 0);
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/* do not generate any interrupts on transmit operations */
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writereg(PP_TxCFG, 0);
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/* do not generate any interrupts on buffer operations */
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writereg(PP_BufCFG, 0);
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/* reset address port, so that autoprobing will keep working */
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outw(PP_ChipID, eth_nic_base + ADD_PORT);
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return;
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}
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/**************************************************************************
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ETH_TRANSMIT - Transmit a frame
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***************************************************************************/
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static void cs89x0_transmit(
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struct nic *nic,
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const char *d, /* Destination */
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unsigned int t, /* Type */
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unsigned int s, /* size */
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const char *p) /* Packet */
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{
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unsigned long tmo;
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int sr;
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/* does this size have to be rounded??? please,
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somebody have a look in the specs */
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if ((sr = ((s + ETH_HLEN + 1)&~1)) < ETH_ZLEN)
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sr = ETH_ZLEN;
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retry:
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/* initiate a transmit sequence */
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outw(TX_AFTER_ALL, eth_nic_base + TX_CMD_PORT);
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outw(sr, eth_nic_base + TX_LEN_PORT);
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/* Test to see if the chip has allocated memory for the packet */
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if ((readreg(PP_BusST) & READY_FOR_TX_NOW) == 0) {
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/* Oops... this should not happen! */
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printf("cs: unable to send packet; retrying...\n");
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for (tmo = currticks() + 5*TICKS_PER_SEC; currticks() < tmo; );
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cs89x0_reset(nic);
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goto retry; }
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/* Write the contents of the packet */
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outsw(eth_nic_base + TX_FRAME_PORT, d, ETH_ALEN/2);
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outsw(eth_nic_base + TX_FRAME_PORT, nic->node_addr,
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ETH_ALEN/2);
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outw(((t >> 8)&0xFF)|(t << 8), eth_nic_base + TX_FRAME_PORT);
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outsw(eth_nic_base + TX_FRAME_PORT, p, (s+1)/2);
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for (sr = sr/2 - (s+1)/2 - ETH_ALEN - 1; sr > 0; sr--)
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outw(0, eth_nic_base + TX_FRAME_PORT);
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/* wait for transfer to succeed */
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for (tmo = currticks()+5*TICKS_PER_SEC;
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(s = readreg(PP_TxEvent)&~0x1F) == 0 && currticks() < tmo;)
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/* nothing */ ;
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if ((s & TX_SEND_OK_BITS) != TX_OK) {
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printf("\ntransmission error %#hX\n", s);
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}
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return;
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}
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/**************************************************************************
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ETH_POLL - Wait for a frame
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***************************************************************************/
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static int cs89x0_poll(struct nic *nic, int retrieve)
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{
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int status;
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status = readreg(PP_RxEvent);
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if ((status & RX_OK) == 0)
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return(0);
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if ( ! retrieve ) return 1;
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status = inw(eth_nic_base + RX_FRAME_PORT);
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nic->packetlen = inw(eth_nic_base + RX_FRAME_PORT);
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insw(eth_nic_base + RX_FRAME_PORT, nic->packet, nic->packetlen >> 1);
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if (nic->packetlen & 1)
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nic->packet[nic->packetlen-1] = inw(eth_nic_base + RX_FRAME_PORT);
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return 1;
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}
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static void cs89x0_irq(struct nic *nic __unused, irq_action_t action __unused)
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{
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switch ( action ) {
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case DISABLE :
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break;
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case ENABLE :
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break;
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case FORCE :
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break;
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}
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}
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static struct nic_operations cs89x0_operations = {
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.connect = dummy_connect,
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.poll = cs89x0_poll,
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.transmit = cs89x0_transmit,
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.irq = cs89x0_irq,
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};
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/**************************************************************************
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ETH_PROBE - Look for an adapter
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***************************************************************************/
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static int cs89x0_probe_addr ( isa_probe_addr_t ioaddr ) {
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/* if they give us an odd I/O address, then do ONE write to
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the address port, to get it back to address zero, where we
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expect to find the EISA signature word. */
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if (ioaddr & 1) {
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ioaddr &= ~1;
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if ((inw(ioaddr + ADD_PORT) & ADD_MASK) != ADD_SIG)
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return 0;
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outw(PP_ChipID, ioaddr + ADD_PORT);
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}
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if (inw(ioaddr + DATA_PORT) != CHIP_EISA_ID_SIG)
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return 0;
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return 1;
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}
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static int cs89x0_probe ( struct nic *nic, struct isa_device *isa __unused ) {
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int i, result = -1;
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unsigned rev_type = 0, isa_cnf, cs_revision;
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unsigned short eeprom_buff[CHKSUM_LEN];
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nic->ioaddr &= ~1; /* LSB = 1 indicates a more aggressive probe */
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eth_nic_base = nic->ioaddr;
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/* get the chip type */
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rev_type = readreg(PRODUCT_ID_ADD);
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eth_cs_type = rev_type &~ REVISON_BITS;
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cs_revision = ((rev_type & REVISON_BITS) >> 8) + 'A';
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printf("\ncs: cs89%c0%s rev %c, base %#hX",
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eth_cs_type==CS8900?'0':'2',
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eth_cs_type==CS8920M?"M":"",
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cs_revision,
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|
eth_nic_base);
|
|
#ifndef EMBEDDED
|
|
/* First check to see if an EEPROM is attached*/
|
|
if ((readreg(PP_SelfST) & EEPROM_PRESENT) == 0) {
|
|
printf("\ncs: no EEPROM...\n");
|
|
outw(PP_ChipID, eth_nic_base + ADD_PORT);
|
|
return 0;
|
|
} else if (get_eeprom_data(START_EEPROM_DATA,CHKSUM_LEN,
|
|
eeprom_buff) < 0) {
|
|
printf("\ncs: EEPROM read failed...\n");
|
|
outw(PP_ChipID, eth_nic_base + ADD_PORT);
|
|
return 0;
|
|
} else if (get_eeprom_chksum(START_EEPROM_DATA,CHKSUM_LEN,
|
|
eeprom_buff) < 0) {
|
|
printf("\ncs: EEPROM checksum bad...\n");
|
|
outw(PP_ChipID, eth_nic_base + ADD_PORT);
|
|
return 0;
|
|
}
|
|
|
|
/* get transmission control word but keep the
|
|
autonegotiation bits */
|
|
eth_auto_neg_cnf = eeprom_buff[AUTO_NEG_CNF_OFFSET/2];
|
|
/* Store adapter configuration */
|
|
eth_adapter_cnf = eeprom_buff[ADAPTER_CNF_OFFSET/2];
|
|
/* Store ISA configuration */
|
|
isa_cnf = eeprom_buff[ISA_CNF_OFFSET/2];
|
|
|
|
/* store the initial memory base address */
|
|
eth_mem_start = eeprom_buff[PACKET_PAGE_OFFSET/2] << 8;
|
|
|
|
printf("%s%s%s, addr ",
|
|
(eth_adapter_cnf & A_CNF_10B_T)?", RJ-45":"",
|
|
(eth_adapter_cnf & A_CNF_AUI)?", AUI":"",
|
|
(eth_adapter_cnf & A_CNF_10B_2)?", BNC":"");
|
|
|
|
/* If this is a CS8900 then no pnp soft */
|
|
if (eth_cs_type != CS8900 &&
|
|
/* Check if the ISA IRQ has been set */
|
|
(i = readreg(PP_CS8920_ISAINT) & 0xff,
|
|
(i != 0 && i < CS8920_NO_INTS)))
|
|
eth_irqno = i;
|
|
else {
|
|
i = isa_cnf & INT_NO_MASK;
|
|
if (eth_cs_type == CS8900) {
|
|
/* the table that follows is dependent
|
|
upon how you wired up your cs8900
|
|
in your system. The table is the
|
|
same as the cs8900 engineering demo
|
|
board. irq_map also depends on the
|
|
contents of the table. Also see
|
|
write_irq, which is the reverse
|
|
mapping of the table below. */
|
|
if (i < 4) i = "\012\013\014\005"[i];
|
|
else printf("\ncs: BUG: isa_config is %d\n", i); }
|
|
eth_irqno = i; }
|
|
|
|
nic->irqno = eth_irqno;
|
|
|
|
/* Retrieve and print the ethernet address. */
|
|
for (i=0; i<ETH_ALEN; i++) {
|
|
nic->node_addr[i] = ((unsigned char *)eeprom_buff)[i];
|
|
}
|
|
|
|
DBG ( "%s\n", eth_ntoa ( nic->node_addr ) );
|
|
|
|
#endif
|
|
#ifdef EMBEDDED
|
|
/* Retrieve and print the ethernet address. */
|
|
{
|
|
unsigned char MAC_HW_ADDR[6]={MAC_HW_ADDR_DRV};
|
|
memcpy(nic->node_addr, MAC_HW_ADDR, 6);
|
|
}
|
|
|
|
DBG ( "%s\n", eth_ntoa ( nic->node_addr ) );
|
|
|
|
eth_adapter_cnf = A_CNF_10B_T | A_CNF_MEDIA_10B_T;
|
|
eth_auto_neg_cnf = EE_AUTO_NEG_ENABLE | IMM_BIT;
|
|
#endif
|
|
#ifndef EMBEDDED
|
|
/* Set the LineCTL quintuplet based on adapter
|
|
configuration read from EEPROM */
|
|
if ((eth_adapter_cnf & A_CNF_EXTND_10B_2) &&
|
|
(eth_adapter_cnf & A_CNF_LOW_RX_SQUELCH))
|
|
eth_linectl = LOW_RX_SQUELCH;
|
|
else
|
|
eth_linectl = 0;
|
|
|
|
/* check to make sure that they have the "right"
|
|
hardware available */
|
|
switch(eth_adapter_cnf & A_CNF_MEDIA_TYPE) {
|
|
case A_CNF_MEDIA_10B_T: result = eth_adapter_cnf & A_CNF_10B_T;
|
|
break;
|
|
case A_CNF_MEDIA_AUI: result = eth_adapter_cnf & A_CNF_AUI;
|
|
break;
|
|
case A_CNF_MEDIA_10B_2: result = eth_adapter_cnf & A_CNF_10B_2;
|
|
break;
|
|
default: result = eth_adapter_cnf & (A_CNF_10B_T | A_CNF_AUI |
|
|
A_CNF_10B_2);
|
|
}
|
|
if (!result) {
|
|
printf("cs: EEPROM is configured for unavailable media\n");
|
|
error:
|
|
writereg(PP_LineCTL, readreg(PP_LineCTL) &
|
|
~(SERIAL_TX_ON | SERIAL_RX_ON));
|
|
outw(PP_ChipID, eth_nic_base + ADD_PORT);
|
|
return 0;
|
|
}
|
|
#endif
|
|
/* Initialize the card for probing of the attached media */
|
|
cs89x0_reset(nic);
|
|
|
|
/* set the hardware to the configured choice */
|
|
switch(eth_adapter_cnf & A_CNF_MEDIA_TYPE) {
|
|
case A_CNF_MEDIA_10B_T:
|
|
result = detect_tp();
|
|
if (!result) {
|
|
clrline();
|
|
printf("10Base-T (RJ-45%s",
|
|
") has no cable\n"); }
|
|
/* check "ignore missing media" bit */
|
|
if (eth_auto_neg_cnf & IMM_BIT)
|
|
/* Yes! I don't care if I see a link pulse */
|
|
result = A_CNF_MEDIA_10B_T;
|
|
break;
|
|
case A_CNF_MEDIA_AUI:
|
|
result = detect_aui(nic);
|
|
if (!result) {
|
|
clrline();
|
|
printf("10Base-5 (AUI%s",
|
|
") has no cable\n"); }
|
|
/* check "ignore missing media" bit */
|
|
if (eth_auto_neg_cnf & IMM_BIT)
|
|
/* Yes! I don't care if I see a carrrier */
|
|
result = A_CNF_MEDIA_AUI;
|
|
break;
|
|
case A_CNF_MEDIA_10B_2:
|
|
result = detect_bnc(nic);
|
|
if (!result) {
|
|
clrline();
|
|
printf("10Base-2 (BNC%s",
|
|
") has no cable\n"); }
|
|
/* check "ignore missing media" bit */
|
|
if (eth_auto_neg_cnf & IMM_BIT)
|
|
/* Yes! I don't care if I can xmit a packet */
|
|
result = A_CNF_MEDIA_10B_2;
|
|
break;
|
|
case A_CNF_MEDIA_AUTO:
|
|
writereg(PP_LineCTL, eth_linectl | AUTO_AUI_10BASET);
|
|
if (eth_adapter_cnf & A_CNF_10B_T)
|
|
if ((result = detect_tp()) != 0)
|
|
break;
|
|
if (eth_adapter_cnf & A_CNF_AUI)
|
|
if ((result = detect_aui(nic)) != 0)
|
|
break;
|
|
if (eth_adapter_cnf & A_CNF_10B_2)
|
|
if ((result = detect_bnc(nic)) != 0)
|
|
break;
|
|
clrline(); printf("no media detected\n");
|
|
goto error;
|
|
}
|
|
clrline();
|
|
switch(result) {
|
|
case 0: printf("no network cable attached to configured media\n");
|
|
goto error;
|
|
case A_CNF_MEDIA_10B_T: printf("using 10Base-T (RJ-45)\n");
|
|
break;
|
|
case A_CNF_MEDIA_AUI: printf("using 10Base-5 (AUI)\n");
|
|
break;
|
|
case A_CNF_MEDIA_10B_2: printf("using 10Base-2 (BNC)\n");
|
|
break;
|
|
}
|
|
|
|
/* Turn on both receive and transmit operations */
|
|
writereg(PP_LineCTL, readreg(PP_LineCTL) | SERIAL_RX_ON |
|
|
SERIAL_TX_ON);
|
|
|
|
return 0;
|
|
#ifdef EMBEDDED
|
|
error:
|
|
writereg(PP_LineCTL, readreg(PP_LineCTL) &
|
|
~(SERIAL_TX_ON | SERIAL_RX_ON));
|
|
outw(PP_ChipID, eth_nic_base + ADD_PORT);
|
|
return 0;
|
|
#endif
|
|
|
|
nic->nic_op = &cs89x0_operations;
|
|
return 1;
|
|
}
|
|
|
|
static void cs89x0_disable ( struct nic *nic,
|
|
struct isa_device *isa __unused ) {
|
|
cs89x0_reset(nic);
|
|
}
|
|
|
|
static isa_probe_addr_t cs89x0_probe_addrs[] = {
|
|
#ifndef EMBEDDED
|
|
/* use "conservative" default values for autoprobing */
|
|
0x300, 0x320, 0x340, 0x200, 0x220, 0x240,
|
|
0x260, 0x280, 0x2a0, 0x2c0, 0x2e0,
|
|
/* if that did not work, then be more aggressive */
|
|
0x301, 0x321, 0x341, 0x201, 0x221, 0x241,
|
|
0x261, 0x281, 0x2a1, 0x2c1, 0x2e1,
|
|
#else
|
|
0x01000300,
|
|
#endif
|
|
};
|
|
|
|
ISA_DRIVER ( cs89x0_driver, cs89x0_probe_addrs, cs89x0_probe_addr,
|
|
ISAPNP_VENDOR('C','S','C'), 0x0007 );
|
|
|
|
DRIVER ( "cs89x0", nic_driver, isa_driver, cs89x0_driver,
|
|
cs89x0_probe, cs89x0_disable );
|
|
|
|
ISA_ROM ( "cs89x0", "Crystal Semiconductor CS89x0" );
|
|
|
|
/*
|
|
* Local variables:
|
|
* c-basic-offset: 8
|
|
* c-indent-level: 8
|
|
* tab-width: 8
|
|
* End:
|
|
*/
|