2a36703af2
Christopher Armenio reported link detection problems with an integrated eepro100 NIC. Thomas Miletich removed link detection code from the eepro100 driver and verified that the driver continued to function. Christopher verified Thomas' patch on his integrated eepro100 NIC. Reported-by: Christopher Armenio <christopher.armenio@resquared.com> Signed-off-by: Thomas Miletich <thomas.miletich@gmail.com> Signed-off-by: Marty Connor <mdc@etherboot.org>
205 lines
8.2 KiB
C
205 lines
8.2 KiB
C
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#ifndef __EEPRO100_H_
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#define __EEPRO100_H_
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FILE_LICENCE ( GPL2_OR_LATER );
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#define CONGENB 0 /* Enable congestion control in the DP83840. */
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#define TX_FIFO 8 /* Tx FIFO threshold in 4 byte units, 0-15 */
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#define RX_FIFO 8 /* Rx FIFO threshold, default 32 bytes. */
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#define TX_DMA_COUNT 0 /* Tx DMA burst length, 0-127, default 0. */
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#define RX_DMA_COUNT 0 /* Rx DMA length, 0 means no preemption. */
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#define CU_CMD_TIMEOUT 1000 /* CU command accept timeout in microseconds */
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#define LINK_CHECK_PERIOD 1000 /* # of poll() calls between link checks */
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#define RFD_PACKET_LEN 1518
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#define RFD_IOB_LEN 1536
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#define RFD_HEADER_LEN 16
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#define CB_ALIGN 2 /* Alignment of command blocks */
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#define RFD_COUNT 4
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#define TCB_COUNT 4
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#define RX_RING_BYTES ( RFD_COUNT * sizeof ( struct ifec_rfd ) )
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#define TX_RING_BYTES ( TCB_COUNT * sizeof ( struct ifec_tcb ) )
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/* some EEPROM addresses */
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#define EEPROM_ADDR_MAC_0 0
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#define EEPROM_ADDR_MDIO_REGISTER 6
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/* Control / Status Register byte offsets - SDM Table 11 */
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enum CSROffsets {
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SCBStatus=0, SCBCmd=2, SCBPointer = 4,
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CSRPort=8, CSRFlash=12, CSREeprom = 14,
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CSRCtrlMDI=16, CSREarlyRx=20
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};
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/* System Control Block Command Word - SDM Table 12 */
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enum SCBCmdBits {
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/* SCB Interrupt Masks - SDM Table 14 */
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SCBMaskCmdDone=0x8000, SCBMaskRxDone=0x4000, SCBMaskCmdIdle=0x2000,
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SCBMaskRxSuspend=0x1000, SCBMaskEarlyRx=0x0800, SCBMaskFlowCtl=0x0400,
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SCBTriggerIntr=0x0200, SCBMaskAll=0x0100,
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/* SCB Control Commands - SDM Table 14-16 */
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CUStart=0x0010, CUResume=0x0020, CUStatsAddr=0x0040,
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CUShowStats=0x0050, CUCmdBase=0x0060, CUDumpStats=0x0070,
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RUStart=0x0001, RUResume=0x0002, RUAbort=0x0004,
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RUAddrLoad=0x0006, RUResumeNoResources=0x0007
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};
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enum SCBPortCmds {
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PortReset=0, PortSelfTest=1, PortPartialReset=2, PortDump=3
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};
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/* Action Commands - SDM Table 14,37 */
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enum ActionCommands {
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CmdNOp = 0, CmdIASetup = 1, CmdConfigure = 2,
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CmdMulticastList = 3, CmdTx = 4, CmdTDR = 5,
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CmdDump = 6, CmdDiagnose = 7,
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/* And some extra flags: */
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CmdEndOfList = 0x8000,
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CmdSuspend = 0x4000, CmdIntr = 0x2000, CmdTxFlex = 0x0008
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};
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enum TCBBits {
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TCB_C=0x8000, TCB_OK=0x2000, TCB_U=0x1000
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};
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enum RFDBits {
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/* Status Word Bits */
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RFDRxCol=0x0001, RFDIAMatch=0x0002, RFDNoMatch=0x0004,
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RFDReserved3=0x0008, RFDRxErr=0x0010, RFDEthType=0x0020,
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RFDReserved6=0x0040, RFDShort=0x0080, RFDDMAOverrun=0x0100,
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RFDNoBufs=0x0200, RFDCRCAlign=0x0400, RFDCRCError=0x0800,
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RFDReserved12=0x1000, RFD_OK=0x2000, RFDComplete=0x8000,
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/* Command Word Bits */
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//RFD_SF=0x0008, RFDSuspend=0x4000, RFDEndOfList=0x8000,
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/* Other */
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RFDMaskCount=0x3FFF
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};
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enum phy_chips {
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NonSuchPhy=0, I82553AB, I82553C,
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I82503, DP83840, S80C240,
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S80C24, PhyUndefined, DP83840A=10
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};
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/* Serial EEPROM section.
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A "bit" grungy, but we work our way through bit-by-bit :->. */
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/* EEPROM_Ctrl bits. */
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#define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */
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#define EE_CS 0x02 /* EEPROM chip select. */
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#define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */
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#define EE_DATA_READ 0x08 /* EEPROM chip data out. */
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#define EE_ENB ( 0x4800 | EE_CS )
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/* Elements of the dump_statistics block. This block must be lword aligned. */
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struct ifec_stats {
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u32
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tx_good_frames, tx_coll16_errs, tx_late_colls,
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tx_underruns, tx_lost_carrier, tx_deferred,
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tx_one_colls, tx_multi_colls, tx_total_colls,
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rx_good_frames, rx_crc_errs, rx_align_errs,
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rx_resource_errs, rx_overrun_errs, rx_colls_errs,
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rx_runt_errs, done_marker;
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};
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struct ifec_tcb { /* A Transmit Command Block & TBD. Must be */
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volatile s16 status; /* word (even address) aligned */
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u16 command;
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u32 link; /* PHYSICAL next ifec_tcb, doesn't change */
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u32 tbda_addr; /* TBD Array, points to TBD below */
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s32 count; /* # of TBD, Tx start thresh., etc. */
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/* The following constitutes a Transmit Buffer Descriptor (TBD).
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* TBDs must be aligned on an even address (word-aligned). */
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u32 tbd_addr0; /* PHYSICAL ptr to Tx data */
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s32 tbd_size0; /* Length of Tx data */
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/* Driver-specific data; not part of TCB format. */
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struct io_buffer *iob; /* Exists from tx() to completion poll() */
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struct ifec_tcb *next; /* VIRTUAL next ifec_tcb, doesn't change */
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};
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struct ifec_rfd { /* A Receive Frame Descriptor. Must be aligned */
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volatile s16 status; /* on a physical word (even address) */
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s16 command;
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u32 link; /* PHYSICAL next ifec_rfd, doesn't change */
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u32 rx_buf_addr; /* Unused. Flex rx mode is not documented */
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u16 count; /* and may be impossible */
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u16 size;
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char packet[RFD_PACKET_LEN];
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};
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struct ifec_ias { /* Individual Address Setup command block. */
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volatile s16 status; /* Must be word (even address) aligned. */
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u16 command;
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u32 link; /* PHYSICAL next command block to process */
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u8 ia[6];
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};
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struct ifec_cfg { /* The configure command format. */
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volatile s16 status;
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u16 command;
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u32 link; /* PHYSICAL next command block to process */
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u8 byte[22]; /* 22 configuration bytes */
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};
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struct ifec_private {
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unsigned long ioaddr;
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struct ifec_stats stats;
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unsigned short mdio_register;
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struct ifec_tcb *tcbs;
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struct ifec_rfd *rfds[RFD_COUNT];
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struct ifec_tcb *tcb_head, *tcb_tail;
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struct io_buffer *tx_iobs[TCB_COUNT];
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struct io_buffer *rx_iobs[RFD_COUNT];
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int cur_rx;
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int tx_curr;
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int tx_tail;
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int tx_cnt;
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/*
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* The configured flag indicates if a Config command was last issued.
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* The following attempt to issue a command (in ifec_tx_wake) will
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* use a START rather than RESUME SCB command. It seems the card won't
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* RESUME after a configure command.
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*/
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int configured;
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struct spi_bit_basher spi;
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struct spi_device eeprom;
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};
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/**************************** Function prototypes ****************************/
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/* PCI device API prototypes */
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static int ifec_pci_probe ( struct pci_device*, const struct pci_device_id*);
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static void ifec_pci_remove ( struct pci_device *pci );
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/* Network device API prototypes */
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static void ifec_net_close ( struct net_device* );
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static void ifec_net_irq ( struct net_device*, int enable );
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static int ifec_net_open ( struct net_device* );
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static void ifec_net_poll ( struct net_device* );
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static int ifec_net_transmit ( struct net_device*, struct io_buffer *iobuf );
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/* Local function prototypes */
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static void ifec_init_eeprom ( struct net_device * );
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static int ifec_mdio_read ( struct net_device *, int phy, int location );
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static void ifec_mdio_setup ( struct net_device *, int options );
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static int ifec_mdio_write ( struct net_device *, int phy, int loc, int val);
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static void ifec_reset ( struct net_device * );
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static void ifec_free ( struct net_device * );
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static void ifec_rfd_init ( struct ifec_rfd *rfd, s16 command, u32 link );
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static void ifec_rx_process ( struct net_device * );
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static void ifec_reprime_ru ( struct net_device * );
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static void ifec_check_ru_status ( struct net_device *, unsigned short );
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static int ifec_get_rx_desc ( struct net_device *, int ,int ,int );
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static void ifec_refill_rx_ring ( struct net_device * );
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static int ifec_rx_setup ( struct net_device * );
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static int ifec_scb_cmd ( struct net_device *, u32 ptr, u8 cmd );
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static int ifec_scb_cmd_wait ( struct net_device * );
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static void ifec_tx_process ( struct net_device * );
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static int ifec_tx_setup ( struct net_device * );
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static void ifec_tx_wake ( struct net_device * );
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#endif
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