37a0aab4ff
The hardware address is an intrinsic property of the hardware, while the link-layer address can be changed at runtime. This separation is exposed via APIs such as PXE and EFI, but is currently elided by gPXE. Expose the hardware and link-layer addresses as separate properties within a net device. Drivers should now fill in hw_addr, which will be used to initialise ll_addr at the time of calling register_netdev().
595 lines
18 KiB
C
595 lines
18 KiB
C
/* rtl8139.c - etherboot driver for the Realtek 8139 chipset
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ported from the linux driver written by Donald Becker
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by Rainer Bawidamann (Rainer.Bawidamann@informatik.uni-ulm.de) 1999
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This software may be used and distributed according to the terms
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of the GNU Public License, incorporated herein by reference.
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changes to the original driver:
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- removed support for interrupts, switching to polling mode (yuck!)
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- removed support for the 8129 chip (external MII)
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*/
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FILE_LICENCE ( GPL_ANY );
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/*********************************************************************/
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/* Revision History */
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/*********************************************************************/
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/*
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27 May 2006 mcb30@users.sourceforge.net (Michael Brown)
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Rewrote to use the new net driver API, the updated PCI API, and
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the generic three-wire serial device support for EEPROM access.
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28 Dec 2002 ken_yap@users.sourceforge.net (Ken Yap)
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Put in virt_to_bus calls to allow Etherboot relocation.
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06 Apr 2001 ken_yap@users.sourceforge.net (Ken Yap)
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Following email from Hyun-Joon Cha, added a disable routine, otherwise
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NIC remains live and can crash the kernel later.
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4 Feb 2000 espenlaub@informatik.uni-ulm.de (Klaus Espenlaub)
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Shuffled things around, removed the leftovers from the 8129 support
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that was in the Linux driver and added a bit more 8139 definitions.
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Moved the 8K receive buffer to a fixed, available address outside the
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0x98000-0x9ffff range. This is a bit of a hack, but currently the only
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way to make room for the Etherboot features that need substantial amounts
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of code like the ANSI console support. Currently the buffer is just below
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0x10000, so this even conforms to the tagged boot image specification,
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which reserves the ranges 0x00000-0x10000 and 0x98000-0xA0000. My
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interpretation of this "reserved" is that Etherboot may do whatever it
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likes, as long as its environment is kept intact (like the BIOS
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variables). Hopefully fixed rtl_poll() once and for all. The symptoms
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were that if Etherboot was left at the boot menu for several minutes, the
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first eth_poll failed. Seems like I am the only person who does this.
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First of all I fixed the debugging code and then set out for a long bug
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hunting session. It took me about a week full time work - poking around
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various places in the driver, reading Don Becker's and Jeff Garzik's Linux
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driver and even the FreeBSD driver (what a piece of crap!) - and
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eventually spotted the nasty thing: the transmit routine was acknowledging
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each and every interrupt pending, including the RxOverrun and RxFIFIOver
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interrupts. This confused the RTL8139 thoroughly. It destroyed the
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Rx ring contents by dumping the 2K FIFO contents right where we wanted to
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get the next packet. Oh well, what fun.
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18 Jan 2000 mdc@etherboot.org (Marty Connor)
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Drastically simplified error handling. Basically, if any error
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in transmission or reception occurs, the card is reset.
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Also, pointed all transmit descriptors to the same buffer to
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save buffer space. This should decrease driver size and avoid
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corruption because of exceeding 32K during runtime.
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28 Jul 1999 (Matthias Meixner - meixner@rbg.informatik.tu-darmstadt.de)
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rtl_poll was quite broken: it used the RxOK interrupt flag instead
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of the RxBufferEmpty flag which often resulted in very bad
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transmission performace - below 1kBytes/s.
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <gpxe/io.h>
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#include <errno.h>
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#include <unistd.h>
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#include <byteswap.h>
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#include <gpxe/pci.h>
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#include <gpxe/if_ether.h>
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#include <gpxe/ethernet.h>
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#include <gpxe/iobuf.h>
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#include <gpxe/netdevice.h>
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#include <gpxe/spi_bit.h>
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#include <gpxe/threewire.h>
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#include <gpxe/nvo.h>
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#define TX_RING_SIZE 4
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struct rtl8139_tx {
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unsigned int next;
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struct io_buffer *iobuf[TX_RING_SIZE];
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};
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struct rtl8139_rx {
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void *ring;
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unsigned int offset;
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};
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struct rtl8139_nic {
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unsigned short ioaddr;
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struct rtl8139_tx tx;
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struct rtl8139_rx rx;
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struct spi_bit_basher spibit;
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struct spi_device eeprom;
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struct nvo_block nvo;
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};
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/* Tuning Parameters */
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#define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
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#define RX_FIFO_THRESH 4 /* Rx buffer level before first PCI xfer. */
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#define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 bytes */
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#define TX_DMA_BURST 4 /* Calculate as 16<<val. */
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#define TX_IPG 3 /* This is the only valid value */
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#define RX_BUF_LEN_IDX 0 /* 0, 1, 2 is allowed - 8,16,32K rx buffer */
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#define RX_BUF_LEN ( (8192 << RX_BUF_LEN_IDX) )
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#define RX_BUF_PAD 4
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/* Symbolic offsets to registers. */
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enum RTL8139_registers {
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MAC0=0, /* Ethernet hardware address. */
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MAR0=8, /* Multicast filter. */
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TxStatus0=0x10, /* Transmit status (four 32bit registers). */
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TxAddr0=0x20, /* Tx descriptors (also four 32bit). */
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RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,
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ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,
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IntrMask=0x3C, IntrStatus=0x3E,
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TxConfig=0x40, RxConfig=0x44,
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Timer=0x48, /* general-purpose counter. */
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RxMissed=0x4C, /* 24 bits valid, write clears. */
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Cfg9346=0x50, Config0=0x51, Config1=0x52,
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TimerIntrReg=0x54, /* intr if gp counter reaches this value */
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MediaStatus=0x58,
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Config3=0x59,
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MultiIntr=0x5C,
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RevisionID=0x5E, /* revision of the RTL8139 chip */
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TxSummary=0x60,
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MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,
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NWayExpansion=0x6A,
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DisconnectCnt=0x6C, FalseCarrierCnt=0x6E,
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NWayTestReg=0x70,
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RxCnt=0x72, /* packet received counter */
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CSCR=0x74, /* chip status and configuration register */
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PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80, /* undocumented */
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/* from 0x84 onwards are a number of power management/wakeup frame
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* definitions we will probably never need to know about. */
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};
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enum RxEarlyStatusBits {
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ERGood=0x08, ERBad=0x04, EROVW=0x02, EROK=0x01
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};
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enum ChipCmdBits {
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CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };
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enum IntrMaskBits {
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SERR=0x8000, TimeOut=0x4000, LenChg=0x2000,
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FOVW=0x40, PUN_LinkChg=0x20, RXOVW=0x10,
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TER=0x08, TOK=0x04, RER=0x02, ROK=0x01
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};
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/* Interrupt register bits, using my own meaningful names. */
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enum IntrStatusBits {
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PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,
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RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,
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TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,
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};
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enum TxStatusBits {
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TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,
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TxOutOfWindow=0x20000000, TxAborted=0x40000000,
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TxCarrierLost=0x80000000,
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};
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enum RxStatusBits {
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RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,
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RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,
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RxBadAlign=0x0002, RxStatusOK=0x0001,
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};
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enum MediaStatusBits {
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MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,
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MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,
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};
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enum MIIBMCRBits {
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BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,
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BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,
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};
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enum CSCRBits {
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CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,
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CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,
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CSCR_LinkDownCmd=0x0f3c0,
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};
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enum RxConfigBits {
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RxCfgWrap=0x80,
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Eeprom9356=0x40,
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AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,
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AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,
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};
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enum Config1Bits {
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VPDEnable=0x02,
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};
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/* EEPROM access */
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#define EE_M1 0x80 /* Mode select bit 1 */
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#define EE_M0 0x40 /* Mode select bit 0 */
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#define EE_CS 0x08 /* EEPROM chip select */
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#define EE_SK 0x04 /* EEPROM shift clock */
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#define EE_DI 0x02 /* Data in */
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#define EE_DO 0x01 /* Data out */
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/* Offsets within EEPROM (these are word offsets) */
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#define EE_MAC 7
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static const uint8_t rtl_ee_bits[] = {
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[SPI_BIT_SCLK] = EE_SK,
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[SPI_BIT_MOSI] = EE_DI,
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[SPI_BIT_MISO] = EE_DO,
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[SPI_BIT_SS(0)] = ( EE_CS | EE_M1 ),
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};
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static int rtl_spi_read_bit ( struct bit_basher *basher,
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unsigned int bit_id ) {
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struct rtl8139_nic *rtl = container_of ( basher, struct rtl8139_nic,
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spibit.basher );
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uint8_t mask = rtl_ee_bits[bit_id];
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uint8_t eereg;
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eereg = inb ( rtl->ioaddr + Cfg9346 );
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return ( eereg & mask );
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}
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static void rtl_spi_write_bit ( struct bit_basher *basher,
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unsigned int bit_id, unsigned long data ) {
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struct rtl8139_nic *rtl = container_of ( basher, struct rtl8139_nic,
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spibit.basher );
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uint8_t mask = rtl_ee_bits[bit_id];
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uint8_t eereg;
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eereg = inb ( rtl->ioaddr + Cfg9346 );
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eereg &= ~mask;
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eereg |= ( data & mask );
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outb ( eereg, rtl->ioaddr + Cfg9346 );
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}
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static struct bit_basher_operations rtl_basher_ops = {
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.read = rtl_spi_read_bit,
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.write = rtl_spi_write_bit,
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};
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/** Portion of EEPROM available for non-volatile stored options
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*
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* We use offset 0x40 (i.e. address 0x20), length 0x40. This block is
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* marked as VPD in the rtl8139 datasheets, so we use it only if we
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* detect that the card is not supporting VPD.
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*/
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static struct nvo_fragment rtl_nvo_fragments[] = {
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{ 0x20, 0x40 },
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{ 0, 0 }
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};
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/**
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* Set up for EEPROM access
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*
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* @v netdev Net device
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*/
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static void rtl_init_eeprom ( struct net_device *netdev ) {
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struct rtl8139_nic *rtl = netdev->priv;
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int ee9356;
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int vpd;
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/* Initialise three-wire bus */
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rtl->spibit.basher.op = &rtl_basher_ops;
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rtl->spibit.bus.mode = SPI_MODE_THREEWIRE;
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init_spi_bit_basher ( &rtl->spibit );
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/* Detect EEPROM type and initialise three-wire device */
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ee9356 = ( inw ( rtl->ioaddr + RxConfig ) & Eeprom9356 );
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if ( ee9356 ) {
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DBGC ( rtl, "rtl8139 %p EEPROM is an AT93C56\n", rtl );
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init_at93c56 ( &rtl->eeprom, 16 );
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} else {
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DBGC ( rtl, "rtl8139 %p EEPROM is an AT93C46\n", rtl );
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init_at93c46 ( &rtl->eeprom, 16 );
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}
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rtl->eeprom.bus = &rtl->spibit.bus;
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/* Initialise space for non-volatile options, if available */
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vpd = ( inw ( rtl->ioaddr + Config1 ) & VPDEnable );
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if ( vpd ) {
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DBGC ( rtl, "rtl8139 %p EEPROM in use for VPD; cannot use "
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"for options\n", rtl );
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} else {
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nvo_init ( &rtl->nvo, &rtl->eeprom.nvs, rtl_nvo_fragments,
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&netdev->refcnt );
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}
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}
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/**
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* Reset NIC
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*
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* @v netdev Net device
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*
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* Issues a hardware reset and waits for the reset to complete.
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*/
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static void rtl_reset ( struct net_device *netdev ) {
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struct rtl8139_nic *rtl = netdev->priv;
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/* Reset chip */
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outb ( CmdReset, rtl->ioaddr + ChipCmd );
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mdelay ( 10 );
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memset ( &rtl->tx, 0, sizeof ( rtl->tx ) );
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rtl->rx.offset = 0;
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}
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/**
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* Open NIC
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*
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* @v netdev Net device
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* @ret rc Return status code
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*/
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static int rtl_open ( struct net_device *netdev ) {
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struct rtl8139_nic *rtl = netdev->priv;
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int i;
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/* Program the MAC address */
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for ( i = 0 ; i < ETH_ALEN ; i++ )
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outb ( netdev->ll_addr[i], rtl->ioaddr + MAC0 + i );
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/* Set up RX ring */
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rtl->rx.ring = malloc ( RX_BUF_LEN + RX_BUF_PAD );
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if ( ! rtl->rx.ring )
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return -ENOMEM;
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outl ( virt_to_bus ( rtl->rx.ring ), rtl->ioaddr + RxBuf );
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DBGC ( rtl, "rtl8139 %p RX ring at %lx\n",
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rtl, virt_to_bus ( rtl->rx.ring ) );
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/* Enable TX and RX */
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outb ( ( CmdRxEnb | CmdTxEnb ), rtl->ioaddr + ChipCmd );
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outl ( ( ( RX_FIFO_THRESH << 13 ) | ( RX_BUF_LEN_IDX << 11 ) |
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( RX_DMA_BURST << 8 ) | AcceptBroadcast | AcceptMulticast |
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AcceptMyPhys ), rtl->ioaddr + RxConfig );
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outl ( 0xffffffffUL, rtl->ioaddr + MAR0 + 0 );
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outl ( 0xffffffffUL, rtl->ioaddr + MAR0 + 4 );
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outl ( ( ( TX_DMA_BURST << 8 ) | ( TX_IPG << 24 ) ),
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rtl->ioaddr + TxConfig );
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return 0;
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}
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/**
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* Close NIC
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*
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* @v netdev Net device
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*/
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static void rtl_close ( struct net_device *netdev ) {
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struct rtl8139_nic *rtl = netdev->priv;
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/* Reset the hardware to disable everything in one go */
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rtl_reset ( netdev );
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/* Free RX ring */
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free ( rtl->rx.ring );
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rtl->rx.ring = NULL;
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}
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/**
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* Transmit packet
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*
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* @v netdev Network device
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* @v iobuf I/O buffer
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* @ret rc Return status code
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*/
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static int rtl_transmit ( struct net_device *netdev,
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struct io_buffer *iobuf ) {
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struct rtl8139_nic *rtl = netdev->priv;
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/* Check for space in TX ring */
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if ( rtl->tx.iobuf[rtl->tx.next] != NULL ) {
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DBGC ( rtl, "rtl8139 %p TX overflow\n", rtl );
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return -ENOBUFS;
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}
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/* Pad and align packet */
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iob_pad ( iobuf, ETH_ZLEN );
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/* Add to TX ring */
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DBGC2 ( rtl, "rtl8139 %p TX id %d at %lx+%zx\n", rtl, rtl->tx.next,
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virt_to_bus ( iobuf->data ), iob_len ( iobuf ) );
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rtl->tx.iobuf[rtl->tx.next] = iobuf;
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outl ( virt_to_bus ( iobuf->data ),
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rtl->ioaddr + TxAddr0 + 4 * rtl->tx.next );
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outl ( ( ( ( TX_FIFO_THRESH & 0x7e0 ) << 11 ) | iob_len ( iobuf ) ),
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rtl->ioaddr + TxStatus0 + 4 * rtl->tx.next );
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rtl->tx.next = ( rtl->tx.next + 1 ) % TX_RING_SIZE;
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return 0;
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}
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/**
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* Poll for received packets
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*
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* @v netdev Network device
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*/
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static void rtl_poll ( struct net_device *netdev ) {
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struct rtl8139_nic *rtl = netdev->priv;
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unsigned int status;
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unsigned int tsad;
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unsigned int rx_status;
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unsigned int rx_len;
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struct io_buffer *rx_iob;
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int wrapped_len;
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int i;
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/* Acknowledge interrupts */
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status = inw ( rtl->ioaddr + IntrStatus );
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if ( ! status )
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return;
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outw ( status, rtl->ioaddr + IntrStatus );
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/* Handle TX completions */
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tsad = inw ( rtl->ioaddr + TxSummary );
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for ( i = 0 ; i < TX_RING_SIZE ; i++ ) {
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if ( ( rtl->tx.iobuf[i] != NULL ) && ( tsad & ( 1 << i ) ) ) {
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DBGC2 ( rtl, "rtl8139 %p TX id %d complete\n",
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rtl, i );
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netdev_tx_complete ( netdev, rtl->tx.iobuf[i] );
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rtl->tx.iobuf[i] = NULL;
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}
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}
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/* Handle received packets */
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while ( ! ( inw ( rtl->ioaddr + ChipCmd ) & RxBufEmpty ) ) {
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rx_status = * ( ( uint16_t * )
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( rtl->rx.ring + rtl->rx.offset ) );
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rx_len = * ( ( uint16_t * )
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( rtl->rx.ring + rtl->rx.offset + 2 ) );
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if ( rx_status & RxOK ) {
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DBGC2 ( rtl, "rtl8139 %p RX packet at offset "
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"%x+%x\n", rtl, rtl->rx.offset, rx_len );
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rx_iob = alloc_iob ( rx_len );
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if ( ! rx_iob ) {
|
|
netdev_rx_err ( netdev, NULL, -ENOMEM );
|
|
/* Leave packet for next call to poll() */
|
|
break;
|
|
}
|
|
|
|
wrapped_len = ( ( rtl->rx.offset + 4 + rx_len )
|
|
- RX_BUF_LEN );
|
|
if ( wrapped_len < 0 )
|
|
wrapped_len = 0;
|
|
|
|
memcpy ( iob_put ( rx_iob, rx_len - wrapped_len ),
|
|
rtl->rx.ring + rtl->rx.offset + 4,
|
|
rx_len - wrapped_len );
|
|
memcpy ( iob_put ( rx_iob, wrapped_len ),
|
|
rtl->rx.ring, wrapped_len );
|
|
|
|
netdev_rx ( netdev, rx_iob );
|
|
} else {
|
|
DBGC ( rtl, "rtl8139 %p RX bad packet (status %#04x "
|
|
"len %d)\n", rtl, rx_status, rx_len );
|
|
netdev_rx_err ( netdev, NULL, -EINVAL );
|
|
}
|
|
rtl->rx.offset = ( ( ( rtl->rx.offset + 4 + rx_len + 3 ) & ~3 )
|
|
% RX_BUF_LEN );
|
|
outw ( rtl->rx.offset - 16, rtl->ioaddr + RxBufPtr );
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Enable/disable interrupts
|
|
*
|
|
* @v netdev Network device
|
|
* @v enable Interrupts should be enabled
|
|
*/
|
|
static void rtl_irq ( struct net_device *netdev, int enable ) {
|
|
struct rtl8139_nic *rtl = netdev->priv;
|
|
|
|
DBGC ( rtl, "rtl8139 %p interrupts %s\n",
|
|
rtl, ( enable ? "enabled" : "disabled" ) );
|
|
outw ( ( enable ? ( ROK | RER | TOK | TER ) : 0 ),
|
|
rtl->ioaddr + IntrMask );
|
|
}
|
|
|
|
/** RTL8139 net device operations */
|
|
static struct net_device_operations rtl_operations = {
|
|
.open = rtl_open,
|
|
.close = rtl_close,
|
|
.transmit = rtl_transmit,
|
|
.poll = rtl_poll,
|
|
.irq = rtl_irq,
|
|
};
|
|
|
|
/**
|
|
* Probe PCI device
|
|
*
|
|
* @v pci PCI device
|
|
* @v id PCI ID
|
|
* @ret rc Return status code
|
|
*/
|
|
static int rtl_probe ( struct pci_device *pci,
|
|
const struct pci_device_id *id __unused ) {
|
|
struct net_device *netdev;
|
|
struct rtl8139_nic *rtl;
|
|
int rc;
|
|
|
|
/* Allocate net device */
|
|
netdev = alloc_etherdev ( sizeof ( *rtl ) );
|
|
if ( ! netdev )
|
|
return -ENOMEM;
|
|
netdev_init ( netdev, &rtl_operations );
|
|
rtl = netdev->priv;
|
|
pci_set_drvdata ( pci, netdev );
|
|
netdev->dev = &pci->dev;
|
|
memset ( rtl, 0, sizeof ( *rtl ) );
|
|
rtl->ioaddr = pci->ioaddr;
|
|
|
|
/* Fix up PCI device */
|
|
adjust_pci_device ( pci );
|
|
|
|
/* Reset the NIC, set up EEPROM access and read MAC address */
|
|
rtl_reset ( netdev );
|
|
rtl_init_eeprom ( netdev );
|
|
nvs_read ( &rtl->eeprom.nvs, EE_MAC, netdev->hw_addr, ETH_ALEN );
|
|
|
|
/* Mark as link up; we don't yet handle link state */
|
|
netdev_link_up ( netdev );
|
|
|
|
/* Register network device */
|
|
if ( ( rc = register_netdev ( netdev ) ) != 0 )
|
|
goto err_register_netdev;
|
|
|
|
/* Register non-volatile storage */
|
|
if ( rtl->nvo.nvs ) {
|
|
if ( ( rc = register_nvo ( &rtl->nvo,
|
|
netdev_settings ( netdev ) ) ) != 0)
|
|
goto err_register_nvo;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_register_nvo:
|
|
unregister_netdev ( netdev );
|
|
err_register_netdev:
|
|
rtl_reset ( netdev );
|
|
netdev_nullify ( netdev );
|
|
netdev_put ( netdev );
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* Remove PCI device
|
|
*
|
|
* @v pci PCI device
|
|
*/
|
|
static void rtl_remove ( struct pci_device *pci ) {
|
|
struct net_device *netdev = pci_get_drvdata ( pci );
|
|
struct rtl8139_nic *rtl = netdev->priv;
|
|
|
|
if ( rtl->nvo.nvs )
|
|
unregister_nvo ( &rtl->nvo );
|
|
unregister_netdev ( netdev );
|
|
rtl_reset ( netdev );
|
|
netdev_nullify ( netdev );
|
|
netdev_put ( netdev );
|
|
}
|
|
|
|
static struct pci_device_id rtl8139_nics[] = {
|
|
PCI_ROM(0x10ec, 0x8129, "rtl8129", "Realtek 8129", 0),
|
|
PCI_ROM(0x10ec, 0x8139, "rtl8139", "Realtek 8139", 0),
|
|
PCI_ROM(0x10ec, 0x8138, "rtl8139b", "Realtek 8139B", 0),
|
|
PCI_ROM(0x1186, 0x1300, "dfe538", "DFE530TX+/DFE538TX", 0),
|
|
PCI_ROM(0x1113, 0x1211, "smc1211-1", "SMC EZ10/100", 0),
|
|
PCI_ROM(0x1112, 0x1211, "smc1211", "SMC EZ10/100", 0),
|
|
PCI_ROM(0x1500, 0x1360, "delta8139", "Delta Electronics 8139", 0),
|
|
PCI_ROM(0x4033, 0x1360, "addtron8139", "Addtron Technology 8139", 0),
|
|
PCI_ROM(0x1186, 0x1340, "dfe690txd", "D-Link DFE690TXD", 0),
|
|
PCI_ROM(0x13d1, 0xab06, "fe2000vx", "AboCom FE2000VX", 0),
|
|
PCI_ROM(0x1259, 0xa117, "allied8139", "Allied Telesyn 8139", 0),
|
|
PCI_ROM(0x14ea, 0xab06, "fnw3603tx", "Planex FNW-3603-TX", 0),
|
|
PCI_ROM(0x14ea, 0xab07, "fnw3800tx", "Planex FNW-3800-TX", 0),
|
|
PCI_ROM(0xffff, 0x8139, "clone-rtl8139", "Cloned 8139", 0),
|
|
};
|
|
|
|
struct pci_driver rtl8139_driver __pci_driver = {
|
|
.ids = rtl8139_nics,
|
|
.id_count = ( sizeof ( rtl8139_nics ) / sizeof ( rtl8139_nics[0] ) ),
|
|
.probe = rtl_probe,
|
|
.remove = rtl_remove,
|
|
};
|