125c6d66a8
These cards very nearly support our current IB Verbs model. There is one minor difference: multicast packets will always be delivered by the hardware to QP0, so the driver has to redirect them to the appropriate QP. This means that QP owners may see receive completions for buffers that they never posted. Nothing in our current codebase will break because of this.
229 lines
8.1 KiB
C
229 lines
8.1 KiB
C
#ifndef _GPXE_BITOPS_H
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#define _GPXE_BITOPS_H
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/*
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* Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/**
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* @file
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*
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* Bit operations
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*
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*/
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#include <stdint.h>
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#include <byteswap.h>
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/* Endianness selection.
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*
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* This is a property of the NIC, not a property of the host CPU.
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*/
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#ifdef BITOPS_LITTLE_ENDIAN
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#define cpu_to_BIT64 cpu_to_le64
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#define cpu_to_BIT32 cpu_to_le32
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#define BIT64_to_cpu le64_to_cpu
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#define BIT32_to_cpu le32_to_cpu
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#endif
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#ifdef BITOPS_BIG_ENDIAN
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#define cpu_to_BIT64 cpu_to_be64
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#define cpu_to_BIT32 cpu_to_be32
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#define BIT64_to_cpu be64_to_cpu
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#define BIT32_to_cpu be32_to_cpu
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#endif
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/** Datatype used to represent a bit in the pseudo-structures */
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typedef unsigned char pseudo_bit_t;
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/**
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* Wrapper structure for pseudo_bit_t structures
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*
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* This structure provides a wrapper around pseudo_bit_t structures.
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* It has the correct size, and also encapsulates type information
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* about the underlying pseudo_bit_t-based structure, which allows the
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* BIT_FILL() etc. macros to work without requiring explicit type
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* information.
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*/
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#define PSEUDO_BIT_STRUCT( _structure ) \
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union { \
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uint8_t bytes[ sizeof ( _structure ) / 8 ]; \
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uint32_t dwords[ sizeof ( _structure ) / 32 ]; \
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uint64_t qwords[ sizeof ( _structure ) / 64 ]; \
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_structure *dummy[0]; \
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} u
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/** Get pseudo_bit_t structure type from wrapper structure pointer */
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#define PSEUDO_BIT_STRUCT_TYPE( _ptr ) \
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typeof ( *((_ptr)->u.dummy[0]) )
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/** Bit offset of a field within a pseudo_bit_t structure */
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#define BIT_OFFSET( _ptr, _field ) \
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offsetof ( PSEUDO_BIT_STRUCT_TYPE ( _ptr ), _field )
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/** Bit width of a field within a pseudo_bit_t structure */
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#define BIT_WIDTH( _ptr, _field ) \
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sizeof ( ( ( PSEUDO_BIT_STRUCT_TYPE ( _ptr ) * ) NULL )->_field )
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/** Qword offset of a field within a pseudo_bit_t structure */
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#define QWORD_OFFSET( _ptr, _field ) \
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( BIT_OFFSET ( _ptr, _field ) / 64 )
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/** Qword bit offset of a field within a pseudo_bit_t structure */
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#define QWORD_BIT_OFFSET( _ptr, _index, _field ) \
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( BIT_OFFSET ( _ptr, _field ) - ( 64 * (_index) ) )
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/** Bit mask for a field within a pseudo_bit_t structure */
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#define BIT_MASK( _ptr, _field ) \
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( ( ~( ( uint64_t ) 0 ) ) >> \
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( 64 - BIT_WIDTH ( _ptr, _field ) ) )
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/*
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* Assemble native-endian qword from named fields and values
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*
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*/
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#define BIT_ASSEMBLE_1( _ptr, _index, _field, _value ) \
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( ( ( uint64_t) (_value) ) << \
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QWORD_BIT_OFFSET ( _ptr, _index, _field ) )
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#define BIT_ASSEMBLE_2( _ptr, _index, _field, _value, ... ) \
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( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \
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BIT_ASSEMBLE_1 ( _ptr, _index, __VA_ARGS__ ) )
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#define BIT_ASSEMBLE_3( _ptr, _index, _field, _value, ... ) \
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( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \
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BIT_ASSEMBLE_2 ( _ptr, _index, __VA_ARGS__ ) )
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#define BIT_ASSEMBLE_4( _ptr, _index, _field, _value, ... ) \
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( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \
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BIT_ASSEMBLE_3 ( _ptr, _index, __VA_ARGS__ ) )
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#define BIT_ASSEMBLE_5( _ptr, _index, _field, _value, ... ) \
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( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \
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BIT_ASSEMBLE_4 ( _ptr, _index, __VA_ARGS__ ) )
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#define BIT_ASSEMBLE_6( _ptr, _index, _field, _value, ... ) \
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( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \
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BIT_ASSEMBLE_5 ( _ptr, _index, __VA_ARGS__ ) )
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#define BIT_ASSEMBLE_7( _ptr, _index, _field, _value, ... ) \
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( BIT_ASSEMBLE_1 ( _ptr, _index, _field, _value ) | \
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BIT_ASSEMBLE_6 ( _ptr, _index, __VA_ARGS__ ) )
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/*
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* Build native-endian (positive) qword bitmasks from named fields
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*
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*/
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#define BIT_MASK_1( _ptr, _index, _field ) \
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( BIT_MASK ( _ptr, _field ) << \
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QWORD_BIT_OFFSET ( _ptr, _index, _field ) )
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#define BIT_MASK_2( _ptr, _index, _field, ... ) \
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( BIT_MASK_1 ( _ptr, _index, _field ) | \
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BIT_MASK_1 ( _ptr, _index, __VA_ARGS__ ) )
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#define BIT_MASK_3( _ptr, _index, _field, ... ) \
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( BIT_MASK_1 ( _ptr, _index, _field ) | \
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BIT_MASK_2 ( _ptr, _index, __VA_ARGS__ ) )
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#define BIT_MASK_4( _ptr, _index, _field, ... ) \
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( BIT_MASK_1 ( _ptr, _index, _field ) | \
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BIT_MASK_3 ( _ptr, _index, __VA_ARGS__ ) )
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#define BIT_MASK_5( _ptr, _index, _field, ... ) \
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( BIT_MASK_1 ( _ptr, _index, _field ) | \
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BIT_MASK_4 ( _ptr, _index, __VA_ARGS__ ) )
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#define BIT_MASK_6( _ptr, _index, _field, ... ) \
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( BIT_MASK_1 ( _ptr, _index, _field ) | \
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BIT_MASK_5 ( _ptr, _index, __VA_ARGS__ ) )
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#define BIT_MASK_7( _ptr, _index, _field, ... ) \
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( BIT_MASK_1 ( _ptr, _index, _field ) | \
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BIT_MASK_6 ( _ptr, _index, __VA_ARGS__ ) )
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/*
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* Populate little-endian qwords from named fields and values
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*
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*/
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#define BIT_FILL( _ptr, _index, _assembled ) do { \
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uint64_t *__ptr = &(_ptr)->u.qwords[(_index)]; \
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uint64_t __assembled = (_assembled); \
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*__ptr = cpu_to_BIT64 ( __assembled ); \
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} while ( 0 )
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#define BIT_FILL_1( _ptr, _field1, ... ) \
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BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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BIT_ASSEMBLE_1 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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_field1, __VA_ARGS__ ) )
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#define BIT_FILL_2( _ptr, _field1, ... ) \
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BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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BIT_ASSEMBLE_2 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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_field1, __VA_ARGS__ ) )
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#define BIT_FILL_3( _ptr, _field1, ... ) \
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BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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BIT_ASSEMBLE_3 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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_field1, __VA_ARGS__ ) )
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#define BIT_FILL_4( _ptr, _field1, ... ) \
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BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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BIT_ASSEMBLE_4 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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_field1, __VA_ARGS__ ) )
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#define BIT_FILL_5( _ptr, _field1, ... ) \
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BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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BIT_ASSEMBLE_5 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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_field1, __VA_ARGS__ ) )
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#define BIT_FILL_6( _ptr, _field1, ... ) \
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BIT_FILL ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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BIT_ASSEMBLE_6 ( _ptr, QWORD_OFFSET ( _ptr, _field1 ), \
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_field1, __VA_ARGS__ ) )
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/** Extract value of named field */
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#define BIT_GET64( _ptr, _field ) \
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( { \
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unsigned int __index = QWORD_OFFSET ( _ptr, _field ); \
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uint64_t *__ptr = &(_ptr)->u.qwords[__index]; \
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uint64_t __value = BIT64_to_cpu ( *__ptr ); \
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__value >>= \
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QWORD_BIT_OFFSET ( _ptr, __index, _field ); \
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__value &= BIT_MASK ( _ptr, _field ); \
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__value; \
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} )
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/** Extract value of named field (for fields up to the size of a long) */
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#define BIT_GET( _ptr, _field ) \
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( ( unsigned long ) BIT_GET64 ( _ptr, _field ) )
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#define BIT_SET( _ptr, _field, _value ) do { \
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unsigned int __index = QWORD_OFFSET ( _ptr, _field ); \
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uint64_t *__ptr = &(_ptr)->u.qwords[__index]; \
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unsigned int __shift = \
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QWORD_BIT_OFFSET ( _ptr, __index, _field ); \
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uint64_t __value = (_value); \
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*__ptr &= cpu_to_BIT64 ( ~( BIT_MASK ( _ptr, _field ) << \
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__shift ) ); \
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*__ptr |= cpu_to_BIT64 ( __value << __shift ); \
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} while ( 0 )
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#endif /* _GPXE_BITOPS_H */
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