169 lines
4.5 KiB
C
169 lines
4.5 KiB
C
#ifndef _SMSC95XX_H
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#define _SMSC95XX_H
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/** @file
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*
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* SMSC LAN95xx USB Ethernet driver
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include "smscusb.h"
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/** Interrupt status register */
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#define SMSC95XX_INT_STS 0x008
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#define SMSC95XX_INT_STS_RXDF_INT 0x00000800UL /**< RX FIFO overflow */
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#define SMSC95XX_INT_STS_PHY_INT 0x00008000UL /**< PHY interrupt */
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/** Transmit configuration register */
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#define SMSC95XX_TX_CFG 0x010
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#define SMSC95XX_TX_CFG_ON 0x00000004UL /**< TX enable */
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/** Hardware configuration register */
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#define SMSC95XX_HW_CFG 0x014
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#define SMSC95XX_HW_CFG_BIR 0x00001000UL /**< Bulk IN use NAK */
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#define SMSC95XX_HW_CFG_LRST 0x00000008UL /**< Soft lite reset */
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/** LED GPIO configuration register */
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#define SMSC95XX_LED_GPIO_CFG 0x024
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#define SMSC95XX_LED_GPIO_CFG_GPCTL2(x) ( (x) << 24 ) /**< GPIO 2 control */
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#define SMSC95XX_LED_GPIO_CFG_GPCTL2_NSPD_LED \
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SMSC95XX_LED_GPIO_CFG_GPCTL2 ( 1 ) /**< Link speed LED */
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#define SMSC95XX_LED_GPIO_CFG_GPCTL1(x) ( (x) << 20 ) /**< GPIO 1 control */
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#define SMSC95XX_LED_GPIO_CFG_GPCTL1_NLNKA_LED \
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SMSC95XX_LED_GPIO_CFG_GPCTL1 ( 1 ) /**< Activity LED */
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#define SMSC95XX_LED_GPIO_CFG_GPCTL0(x) ( (x) << 16 ) /**< GPIO 0 control */
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#define SMSC95XX_LED_GPIO_CFG_GPCTL0_NFDX_LED \
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SMSC95XX_LED_GPIO_CFG_GPCTL0 ( 1 ) /**< Full-duplex LED */
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/** EEPROM register base */
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#define SMSC95XX_E2P_BASE 0x030
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/** Interrupt endpoint control register */
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#define SMSC95XX_INT_EP_CTL 0x068
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#define SMSC95XX_INT_EP_CTL_RXDF_EN 0x00000800UL /**< RX FIFO overflow */
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#define SMSC95XX_INT_EP_CTL_PHY_EN 0x00008000UL /**< PHY interrupt */
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/** Bulk IN delay register */
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#define SMSC95XX_BULK_IN_DLY 0x06c
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#define SMSC95XX_BULK_IN_DLY_SET(ticks) ( (ticks) << 0 ) /**< Delay / 16.7ns */
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/** MAC control register */
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#define SMSC95XX_MAC_CR 0x100
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#define SMSC95XX_MAC_CR_RXALL 0x80000000UL /**< Receive all */
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#define SMSC95XX_MAC_CR_FDPX 0x00100000UL /**< Full duplex */
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#define SMSC95XX_MAC_CR_MCPAS 0x00080000UL /**< All multicast */
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#define SMSC95XX_MAC_CR_PRMS 0x00040000UL /**< Promiscuous */
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#define SMSC95XX_MAC_CR_PASSBAD 0x00010000UL /**< Pass bad frames */
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#define SMSC95XX_MAC_CR_TXEN 0x00000008UL /**< TX enabled */
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#define SMSC95XX_MAC_CR_RXEN 0x00000004UL /**< RX enabled */
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/** MAC address register base */
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#define SMSC95XX_ADDR_BASE 0x104
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/** MII register base */
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#define SMSC95XX_MII_BASE 0x0114
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/** Receive packet header */
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struct smsc95xx_rx_header {
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/** Command word */
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uint32_t command;
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} __attribute__ (( packed ));
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/** Runt frame */
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#define SMSC95XX_RX_RUNT 0x00004000UL
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/** Late collision */
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#define SMSC95XX_RX_LATE 0x00000040UL
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/** CRC error */
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#define SMSC95XX_RX_CRC 0x00000002UL
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/** Transmit packet header */
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struct smsc95xx_tx_header {
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/** Command word */
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uint32_t command;
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/** Frame length */
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uint32_t len;
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} __attribute__ (( packed ));
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/** First segment */
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#define SMSC95XX_TX_FIRST 0x00002000UL
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/** Last segment */
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#define SMSC95XX_TX_LAST 0x00001000UL
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/** Buffer size */
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#define SMSC95XX_TX_LEN(len) ( (len) << 0 )
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/** Receive statistics */
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struct smsc95xx_rx_statistics {
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/** Good frames */
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uint32_t good;
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/** CRC errors */
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uint32_t crc;
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/** Runt frame errors */
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uint32_t undersize;
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/** Alignment errors */
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uint32_t alignment;
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/** Frame too long errors */
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uint32_t oversize;
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/** Later collision errors */
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uint32_t late;
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/** Bad frames */
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uint32_t bad;
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/** Dropped frames */
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uint32_t dropped;
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} __attribute__ (( packed ));
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/** Receive statistics */
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#define SMSC95XX_RX_STATISTICS 0
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/** Transmit statistics */
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struct smsc95xx_tx_statistics {
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/** Good frames */
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uint32_t good;
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/** Pause frames */
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uint32_t pause;
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/** Single collisions */
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uint32_t single;
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/** Multiple collisions */
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uint32_t multiple;
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/** Excessive collisions */
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uint32_t excessive;
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/** Late collisions */
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uint32_t late;
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/** Buffer underruns */
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uint32_t underrun;
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/** Excessive deferrals */
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uint32_t deferred;
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/** Carrier errors */
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uint32_t carrier;
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/** Bad frames */
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uint32_t bad;
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} __attribute__ (( packed ));
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/** Transmit statistics */
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#define SMSC95XX_TX_STATISTICS 1
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/** Reset delay (in microseconds) */
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#define SMSC95XX_RESET_DELAY_US 2
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/** Bulk IN maximum fill level
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*
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* This is a policy decision.
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*/
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#define SMSC95XX_IN_MAX_FILL 8
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/** Bulk IN buffer size */
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#define SMSC95XX_IN_MTU \
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( sizeof ( struct smsc95xx_rx_header ) + \
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ETH_FRAME_LEN + 4 /* possible VLAN header */ \
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+ 4 /* CRC */ )
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/** Honeywell VM3 MAC address OEM string index */
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#define SMSC95XX_VM3_OEM_STRING_MAC 2
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#endif /* _SMSC95XX_H */
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