272 lines
7.3 KiB
C
272 lines
7.3 KiB
C
#ifndef _LINDA_H
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#define _LINDA_H
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/*
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* Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/**
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* @file
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*
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* QLogic Linda Infiniband HCA
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*
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*/
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#define BITOPS_LITTLE_ENDIAN
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#include <gpxe/bitops.h>
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#include "qib_7220_regs.h"
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struct ib_device;
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/** A Linda GPIO register */
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struct QIB_7220_GPIO_pb {
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pseudo_bit_t GPIO[16];
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pseudo_bit_t Reserved[48];
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};
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struct QIB_7220_GPIO {
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PSEUDO_BIT_STRUCT ( struct QIB_7220_GPIO_pb );
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};
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/** A Linda general scalar register */
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struct QIB_7220_scalar_pb {
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pseudo_bit_t Value[64];
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};
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struct QIB_7220_scalar {
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PSEUDO_BIT_STRUCT ( struct QIB_7220_scalar_pb );
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};
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/** Linda send per-buffer control word */
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struct QIB_7220_SendPbc_pb {
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pseudo_bit_t LengthP1_toibc[11];
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pseudo_bit_t Reserved1[4];
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pseudo_bit_t LengthP1_trigger[11];
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pseudo_bit_t Reserved2[3];
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pseudo_bit_t TestEbp[1];
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pseudo_bit_t Test[1];
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pseudo_bit_t Intr[1];
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pseudo_bit_t Reserved3[31];
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pseudo_bit_t VL15[1];
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};
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struct QIB_7220_SendPbc {
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PSEUDO_BIT_STRUCT ( struct QIB_7220_SendPbc_pb );
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};
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/** Linda send buffer availability */
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struct QIB_7220_SendBufAvail_pb {
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pseudo_bit_t InUseCheck[144][2];
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pseudo_bit_t Reserved[32];
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};
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struct QIB_7220_SendBufAvail {
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PSEUDO_BIT_STRUCT ( struct QIB_7220_SendBufAvail_pb );
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};
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/** DMA alignment for send buffer availability */
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#define LINDA_SENDBUFAVAIL_ALIGN 64
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/** A Linda eager receive descriptor */
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struct QIB_7220_RcvEgr_pb {
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pseudo_bit_t Addr[37];
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pseudo_bit_t BufSize[3];
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pseudo_bit_t Reserved[24];
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};
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struct QIB_7220_RcvEgr {
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PSEUDO_BIT_STRUCT ( struct QIB_7220_RcvEgr_pb );
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};
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/** Linda receive header flags */
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struct QIB_7220_RcvHdrFlags_pb {
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pseudo_bit_t PktLen[11];
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pseudo_bit_t RcvType[3];
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pseudo_bit_t SoftB[1];
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pseudo_bit_t SoftA[1];
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pseudo_bit_t EgrIndex[12];
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pseudo_bit_t Reserved1[3];
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pseudo_bit_t UseEgrBfr[1];
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pseudo_bit_t RcvSeq[4];
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pseudo_bit_t HdrqOffset[11];
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pseudo_bit_t Reserved2[8];
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pseudo_bit_t IBErr[1];
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pseudo_bit_t MKErr[1];
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pseudo_bit_t TIDErr[1];
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pseudo_bit_t KHdrErr[1];
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pseudo_bit_t MTUErr[1];
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pseudo_bit_t LenErr[1];
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pseudo_bit_t ParityErr[1];
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pseudo_bit_t VCRCErr[1];
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pseudo_bit_t ICRCErr[1];
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};
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struct QIB_7220_RcvHdrFlags {
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PSEUDO_BIT_STRUCT ( struct QIB_7220_RcvHdrFlags_pb );
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};
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/** Linda memory BAR size */
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#define LINDA_BAR0_SIZE 0x400000
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/** Linda I2C SCL line GPIO number */
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#define LINDA_GPIO_SCL 0
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/** Linda I2C SDA line GPIO number */
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#define LINDA_GPIO_SDA 1
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/** GUID offset within EEPROM */
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#define LINDA_EEPROM_GUID_OFFSET 3
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/** GUID size within EEPROM */
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#define LINDA_EEPROM_GUID_SIZE 8
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/** Board serial number offset within EEPROM */
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#define LINDA_EEPROM_SERIAL_OFFSET 12
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/** Board serial number size within EEPROM */
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#define LINDA_EEPROM_SERIAL_SIZE 12
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/** Maximum number of send buffers used
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*
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* This is a policy decision. Must be less than or equal to the total
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* number of send buffers supported by the hardware (128).
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*/
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#define LINDA_MAX_SEND_BUFS 32
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/** Linda send buffer size */
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#define LINDA_SEND_BUF_SIZE 4096
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/** Number of contexts (including kernel context)
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*
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* This is a policy decision. Must be 5, 9 or 17.
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*/
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#define LINDA_NUM_CONTEXTS 5
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/** PortCfg values for different numbers of contexts */
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enum linda_portcfg {
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LINDA_PORTCFG_5CTX = 0,
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LINDA_PORTCFG_9CTX = 1,
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LINDA_PORTCFG_17CTX = 2,
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};
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/** PortCfg values for different numbers of contexts */
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#define LINDA_EAGER_ARRAY_SIZE_5CTX_0 2048
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#define LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER 4096
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#define LINDA_EAGER_ARRAY_SIZE_9CTX_0 2048
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#define LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER 2048
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#define LINDA_EAGER_ARRAY_SIZE_17CTX_0 2048
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#define LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER 1024
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/** Eager buffer required alignment */
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#define LINDA_EAGER_BUFFER_ALIGN 2048
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/** Eager buffer size encodings */
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enum linda_eager_buffer_size {
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LINDA_EAGER_BUFFER_NONE = 0,
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LINDA_EAGER_BUFFER_2K = 1,
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LINDA_EAGER_BUFFER_4K = 2,
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LINDA_EAGER_BUFFER_8K = 3,
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LINDA_EAGER_BUFFER_16K = 4,
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LINDA_EAGER_BUFFER_32K = 5,
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LINDA_EAGER_BUFFER_64K = 6,
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};
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/** Number of RX headers per context
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*
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* This is a policy decision.
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*/
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#define LINDA_RECV_HEADER_COUNT 8
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/** Maximum size of each RX header
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*
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* This is a policy decision. Must be divisible by 4.
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*/
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#define LINDA_RECV_HEADER_SIZE 96
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/** Total size of an RX header ring */
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#define LINDA_RECV_HEADERS_SIZE \
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( LINDA_RECV_HEADER_SIZE * LINDA_RECV_HEADER_COUNT )
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/** RX header alignment */
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#define LINDA_RECV_HEADERS_ALIGN 64
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/** RX payload size
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*
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* This is a policy decision. Must be a valid eager buffer size.
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*/
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#define LINDA_RECV_PAYLOAD_SIZE 2048
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/** QPN used for Infinipath Packets
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*
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* This is a policy decision. Must have bit 0 clear. Must not be a
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* QPN that we will use.
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*/
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#define LINDA_QP_IDETH 0xdead0
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/** Maximum time for wait for external parallel bus request, in us */
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#define LINDA_EPB_REQUEST_MAX_WAIT_US 500
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/** Maximum time for wait for external parallel bus transaction, in us */
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#define LINDA_EPB_XACT_MAX_WAIT_US 500
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/** Linda external parallel bus chip selects */
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#define LINDA_EPB_CS_SERDES 1
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#define LINDA_EPB_CS_UC 2
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/** Linda external parallel bus read/write operations */
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#define LINDA_EPB_WRITE 0
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#define LINDA_EPB_READ 1
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/** Linda external parallel bus register addresses */
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#define LINDA_EPB_ADDRESS( _channel, _element, _reg ) \
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( (_element) | ( (_channel) << 4 ) | ( (_reg) << 9 ) )
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#define LINDA_EPB_ADDRESS_CHANNEL( _address ) ( ( (_address) >> 4 ) & 0x1f )
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#define LINDA_EPB_ADDRESS_ELEMENT( _address ) ( ( (_address) >> 0 ) & 0x0f )
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#define LINDA_EPB_ADDRESS_REG( _address ) ( ( (_address) >> 9 ) & 0x3f )
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/** Linda external parallel bus locations
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*
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* The location is used by the driver to encode both the chip select
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* and the EPB address.
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*/
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#define LINDA_EPB_LOC( _cs, _channel, _element, _reg) \
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( ( (_cs) << 16 ) | LINDA_EPB_ADDRESS ( _channel, _element, _reg ) )
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#define LINDA_EPB_LOC_ADDRESS( _loc ) ( (_loc) & 0xffff )
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#define LINDA_EPB_LOC_CS( _loc ) ( (_loc) >> 16 )
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/** Linda external parallel bus microcontroller register addresses */
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#define LINDA_EPB_UC_CHANNEL 6
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#define LINDA_EPB_UC_LOC( _reg ) \
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LINDA_EPB_LOC ( LINDA_EPB_CS_UC, LINDA_EPB_UC_CHANNEL, 0, (_reg) )
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#define LINDA_EPB_UC_CTL LINDA_EPB_UC_LOC ( 0 )
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#define LINDA_EPB_UC_CTL_WRITE 1
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#define LINDA_EPB_UC_CTL_READ 2
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#define LINDA_EPB_UC_ADDR_LO LINDA_EPB_UC_LOC ( 2 )
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#define LINDA_EPB_UC_ADDR_HI LINDA_EPB_UC_LOC ( 3 )
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#define LINDA_EPB_UC_DATA LINDA_EPB_UC_LOC ( 4 )
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#define LINDA_EPB_UC_CHUNK_SIZE 64
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extern uint8_t linda_ib_fw[8192];
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/** Maximum time to wait for "trim done" signal, in ms */
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#define LINDA_TRIM_DONE_MAX_WAIT_MS 1000
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/** Linda link states */
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enum linda_link_state {
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LINDA_LINK_STATE_DOWN = 0,
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LINDA_LINK_STATE_INIT = 1,
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LINDA_LINK_STATE_ARM = 2,
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LINDA_LINK_STATE_ACTIVE = 3,
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LINDA_LINK_STATE_ACT_DEFER = 4,
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};
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#endif /* _LINDA_H */
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