768 lines
18 KiB
ArmAsm
768 lines
18 KiB
ArmAsm
/* #defines because ljmp wants a number, probably gas bug */
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/* .equ KERN_CODE_SEG,_pmcs-_gdt */
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#define KERN_CODE_SEG 0x08
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.equ KERN_DATA_SEG,_pmds-_gdt
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/* .equ REAL_CODE_SEG,_rmcs-_gdt */
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#define REAL_CODE_SEG 0x18
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.equ REAL_DATA_SEG,_rmds-_gdt
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.equ FLAT_CODE_SEG,_pmcs2-_gdt
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.equ FLAT_DATA_SEG,_pmds2-_gdt
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.equ CR0_PE,1
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#ifdef CONFIG_X86_64
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.equ LM_CODE_SEG, _lmcs-_gdt
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.equ LM_DATA_SEG, _lmds-_gdt
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#endif
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.equ MSR_K6_EFER, 0xC0000080
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.equ EFER_LME, 0x00000100
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.equ X86_CR4_PAE, 0x00000020
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.equ CR0_PG, 0x80000000
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#ifdef GAS291
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#define DATA32 data32;
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#define ADDR32 addr32;
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#define LJMPI(x) ljmp x
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#else
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#define DATA32 data32
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#define ADDR32 addr32
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/* newer GAS295 require #define LJMPI(x) ljmp *x */
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#define LJMPI(x) ljmp x
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#endif
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#define BOCHSBP xchgw %bx, %bx
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#include "callbacks.h"
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#define NUM_PUSHA_REGS (8)
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#define NUM_SEG_REGS (6)
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/*
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* NOTE: if you write a subroutine that is called from C code (gcc/egcs),
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* then you only have to take care of %ebx, %esi, %edi and %ebp. These
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* registers must not be altered under any circumstance. All other registers
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* may be clobbered without any negative side effects. If you don't follow
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* this rule then you'll run into strange effects that only occur on some
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* gcc versions (because the register allocator may use different registers).
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*
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* All the data32 prefixes for the ljmp instructions are necessary, because
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* the assembler emits code with a relocation address of 0. This means that
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* all destinations are initially negative, which the assembler doesn't grok,
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* because for some reason negative numbers don't fit into 16 bits. The addr32
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* prefixes are there for the same reasons, because otherwise the memory
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* references are only 16 bit wide. Theoretically they are all superfluous.
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* One last note about prefixes: the data32 prefixes on all call _real_to_prot
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* instructions could be removed if the _real_to_prot function is changed to
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* deal correctly with 16 bit return addresses. I tried it, but failed.
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*/
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/**************************************************************************
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* START
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*
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* This file is no longer enterered from the top. init.S will jump to
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* either _in_call or _rm_in_call, depending on the processor mode
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* when init.S was entered.
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**************************************************************************/
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.text
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.arch i386
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.code32
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/**************************************************************************
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_IN_CALL - make a call in to Etherboot.
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**************************************************************************/
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/* There are two 32-bit entry points: _in_call and _in_call_far, for
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* near calls and far calls respectively. Both should be called with
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* flat physical addresses. They will result in a call to the C
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* routine in_call(); see there for API details.
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*
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* Note that this routine makes fairly heavy use of the stack and no
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* use of fixed data areas. This is because it must be re-entrant;
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* there may be more than one concurrent call in to Etherboot.
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*/
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#define IC_OFFSET_VA_LIST_PTR ( 0 )
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#define IC_OFFSET_VA_LIST_PTR_E ( IC_OFFSET_VA_LIST_PTR + 4 )
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#define IC_OFFSET_REGISTERS ( IC_OFFSET_VA_LIST_PTR_E )
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#define IC_OFFSET_REGISTERS_E ( IC_OFFSET_REGISTERS + ( NUM_PUSHA_REGS * 4 ) )
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#define IC_OFFSET_SEG_REGS ( IC_OFFSET_REGISTERS_E )
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#define IC_OFFSET_SEG_REGS_E ( IC_OFFSET_SEG_REGS + ( NUM_SEG_REGS * 2 ) )
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#define IC_OFFSET_GDT ( IC_OFFSET_SEG_REGS_E )
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#define IC_OFFSET_GDT_E ( IC_OFFSET_GDT + 8 )
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#define IC_OFFSET_FLAGS ( IC_OFFSET_GDT_E )
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#define IC_OFFSET_FLAGS_E ( IC_OFFSET_FLAGS + 4 )
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#define IC_OFFSET_RETADDR ( IC_OFFSET_FLAGS_E )
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#define IC_OFFSET_RETADDR_E ( IC_OFFSET_RETADDR + 8 )
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#define IC_OFFSET_ORIG_STACK ( IC_OFFSET_RETADDR )
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#define IC_OFFSET_OPCODE ( IC_OFFSET_ORIG_STACK + 8 )
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#define IC_OFFSET_OPCODE_E ( IC_OFFSET_OPCODE + 4 )
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#define IC_OFFSET_VA_LIST ( IC_OFFSET_OPCODE_E )
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.code32
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.globl _in_call
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.globl _in_call_far
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_in_call:
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/* Expand to far return address */
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pushl %eax /* Store %eax */
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xorl %eax, %eax
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movw %cs, %ax
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xchgl %eax, 4(%esp) /* 4(%esp) = %cs, %eax = ret addr */
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xchgl %eax, 0(%esp) /* 0(%esp) = ret addr, restore %eax */
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_in_call_far:
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/* Store flags */
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pushfl
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/* Store the GDT */
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subl $8, %esp
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sgdt 0(%esp)
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/* Store segment register values */
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pushw %gs
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pushw %fs
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pushw %es
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pushw %ds
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pushw %ss
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pushw %cs
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/* Store general-purpose register values */
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pushal
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/* Replace %esp in store with physical %esp value on entry */
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leal (IC_OFFSET_ORIG_STACK - IC_OFFSET_REGISTERS)(%esp), %eax
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movl %eax, (IC_OFFSET_REGISTERS - IC_OFFSET_REGISTERS + 12)(%esp)
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/* Store va_list pointer (physical address) */
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leal (IC_OFFSET_VA_LIST - IC_OFFSET_VA_LIST_PTR_E)(%esp), %eax
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pushl %eax
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/* IC_OFFSET_*(%esp) are now valid */
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/* Switch to virtual addresses */
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call _phys_to_virt
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/* Fixup the va_list pointer */
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movl virt_offset, %ebp
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subl %ebp, IC_OFFSET_VA_LIST_PTR(%esp)
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/* Check opcode for EB_USE_INTERNAL_STACK flag */
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movl IC_OFFSET_OPCODE(%esp), %eax
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testl $EB_USE_INTERNAL_STACK, %eax
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je 2f
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/* Use internal stack flag set */
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/* Check %esp is not already in internal stack range */
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leal _stack, %esi /* %esi = bottom of internal stack */
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leal _estack, %edi /* %edi = top of internal stack */
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cmpl %esi, %esp
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jb 1f
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cmpl %edi, %esp
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jbe 2f
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1: /* %esp not currently in internal stack range */
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movl %esp, %esi /* %esi = original stack */
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movl $IC_OFFSET_OPCODE_E, %ecx /* %ecx = length to transfer */
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subl %ecx, %edi /* %edi = internal stack pos */
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movl %edi, %esp /* = new %esp */
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rep movsb /* Copy data to internal stack */
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2:
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/* Call to C code */
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call i386_in_call
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/* Set %eax (return code from C) in registers structure on
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* stack, so that we return it to the caller.
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*/
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movl %eax, (IC_OFFSET_REGISTERS + 28)(%esp)
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/* Calculate physical continuation address */
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movl virt_offset, %ebp
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movzwl (IC_OFFSET_SEG_REGS + 0)(%esp), %eax /* %cs */
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movzwl (IC_OFFSET_SEG_REGS + 2)(%esp), %ebx /* %ss */
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pushl %eax /* Continuation segment */
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leal 1f(%ebp), %eax
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pushl %eax /* Continuation offset */
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/* Restore caller's GDT */
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cli /* Temporarily disable interrupts */
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lgdt (8+IC_OFFSET_GDT)(%esp)
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/* Reset %ss and adjust %esp */
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movw %bx, %ss
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addl %ebp, %esp
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lret /* Reload %cs:eip, flush prefetch */
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1:
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/* Skip va_list ptr */
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popl %eax
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/* Reload general-purpose registers to be returned */
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popal
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/* Reload segment registers as passed in from caller */
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popw %gs
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popw %fs
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popw %es
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popw %ds
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addl $(4+8), %esp /* Skip %cs, %ss and GDT (already reloaded) */
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/* Restore flags (including revert of interrupt status) */
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popfl
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/* Restore physical %esp from entry. It will only be
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* different if EB_USE_INTERNAL_STACK was specified.
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*/
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movl ( 12 + IC_OFFSET_REGISTERS - IC_OFFSET_RETADDR )(%esp), %esp
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/* Check for EB_SKIP_OPCODE */
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pushfl
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testl $EB_SKIP_OPCODE, 12(%esp)
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jnz 1f
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/* Normal return */
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popfl
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lret
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1: /* Return and skip opcode */
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popfl
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lret $4
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/**************************************************************************
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RELOCATE_TO - relocate etherboot to the specified address
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**************************************************************************/
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.globl relocate_to
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relocate_to:
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/* Save the callee save registers */
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pushl %ebp
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pushl %esi
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pushl %edi
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/* Compute the virtual destination address */
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movl 16(%esp), %edi # dest
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subl virt_offset, %edi
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/* Compute the new value of virt_offset */
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movl 16(%esp), %ebp # virt_offset
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subl $_text, %ebp
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/* Fixup the gdt */
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pushl $_pmcs
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pushl %ebp # virt_offset
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call set_seg_base
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addl $8, %esp
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/* Fixup gdtarg */
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leal _gdt(%ebp), %eax
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movl %eax, gdtarg +2
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/* Fixup virt_offset */
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movl %ebp, virt_offset
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/* Load the move parameters */
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movl $_text, %esi
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movl $_end, %ecx
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subl %esi, %ecx
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/* Move etherboot uses %esi, %edi, %ecx */
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rep
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movsb
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/* Reload the gdt */
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cs
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lgdt gdtarg
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/* Reload %cs */
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ljmp $KERN_CODE_SEG, $1f
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1:
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/* reload other segment registers */
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movl $KERN_DATA_SEG, %eax
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movl %eax,%ds
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movl %eax,%es
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movl %eax,%ss
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movl %eax,%fs
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movl %eax,%gs
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/* Restore the callee save registers */
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popl %edi
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popl %esi
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popl %ebp
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/* return */
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ret
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/**************************************************************************
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XSTART32 - Transfer control to the kernel just loaded
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**************************************************************************/
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.globl xstart32
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xstart32:
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/* Save the callee save registers */
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movl %ebp, os_regs + 32
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movl %esi, os_regs + 36
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movl %edi, os_regs + 40
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movl %ebx, os_regs + 44
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/* save the return address */
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popl %eax
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movl %eax, os_regs + 48
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/* save the stack pointer */
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movl %esp, os_regs + 52
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/* Get the new destination address */
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popl %ecx
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/* Store the physical address of xend on the stack */
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movl $xend32, %ebx
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addl virt_offset, %ebx
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pushl %ebx
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/* Store the destination address on the stack */
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pushl $FLAT_CODE_SEG
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pushl %ecx
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/* Cache virt_offset */
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movl virt_offset, %ebp
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/* Switch to using physical addresses */
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call _virt_to_phys
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/* Save the target stack pointer */
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movl %esp, os_regs + 12(%ebp)
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leal os_regs(%ebp), %esp
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/* Store the pointer to os_regs */
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movl %esp, os_regs_ptr(%ebp)
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/* Load my new registers */
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popal
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movl (-32 + 12)(%esp), %esp
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/* Jump to the new kernel
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* The lret switches to a flat code segment
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*/
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lret
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.balign 4
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.globl xend32
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xend32:
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/* Fixup %eflags */
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nop
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cli
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cld
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/* Load %esp with &os_regs + virt_offset */
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.byte 0xbc /* movl $0, %esp */
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os_regs_ptr:
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.long 0
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/* Save the result registers */
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addl $32, %esp
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pushal
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/* Compute virt_offset */
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movl %esp, %ebp
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subl $os_regs, %ebp
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/* Load the stack pointer */
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movl 52(%esp), %esp
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/* Enable the virtual addresses */
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leal _phys_to_virt(%ebp), %eax
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call *%eax
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/* Restore the callee save registers */
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movl os_regs + 32, %ebp
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movl os_regs + 36, %esi
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movl os_regs + 40, %edi
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movl os_regs + 44, %ebx
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movl os_regs + 48, %edx
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movl os_regs + 52, %esp
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/* Get the C return value */
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movl os_regs + 28, %eax
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jmpl *%edx
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#ifdef CONFIG_X86_64
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.arch sledgehammer
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/**************************************************************************
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XSTART_lm - Transfer control to the kernel just loaded in long mode
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**************************************************************************/
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.globl xstart_lm
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xstart_lm:
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/* Save the callee save registers */
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pushl %ebp
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pushl %esi
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pushl %edi
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pushl %ebx
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/* Cache virt_offset && (virt_offset & 0xfffff000) */
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movl virt_offset, %ebp
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movl %ebp, %ebx
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andl $0xfffff000, %ebx
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/* Switch to using physical addresses */
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call _virt_to_phys
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/* Initialize the page tables */
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/* Level 4 */
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leal 0x23 + pgt_level3(%ebx), %eax
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leal pgt_level4(%ebx), %edi
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movl %eax, (%edi)
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/* Level 3 */
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leal 0x23 + pgt_level2(%ebx), %eax
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leal pgt_level3(%ebx), %edi
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movl %eax, 0x00(%edi)
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addl $4096, %eax
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movl %eax, 0x08(%edi)
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addl $4096, %eax
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movl %eax, 0x10(%edi)
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addl $4096, %eax
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movl %eax, 0x18(%edi)
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/* Level 2 */
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movl $0xe3, %eax
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leal pgt_level2(%ebx), %edi
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leal 16384(%edi), %esi
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pgt_level2_loop:
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movl %eax, (%edi)
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addl $8, %edi
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addl $0x200000, %eax
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cmp %esi, %edi
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jne pgt_level2_loop
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/* Point at the x86_64 page tables */
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leal pgt_level4(%ebx), %edi
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movl %edi, %cr3
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/* Setup for the return from 64bit mode */
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/* 64bit align the stack */
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movl %esp, %ebx /* original stack pointer + 16 */
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andl $0xfffffff8, %esp
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/* Save original stack pointer + 16 */
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pushl %ebx
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/* Save virt_offset */
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pushl %ebp
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/* Setup for the jmp to 64bit long mode */
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leal start_lm(%ebp), %eax
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movl %eax, 0x00 + start_lm_addr(%ebp)
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movl $LM_CODE_SEG, %eax
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movl %eax, 0x04 + start_lm_addr(%ebp)
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/* Setup for the jump out of 64bit long mode */
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leal end_lm(%ebp), %eax
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movl %eax, 0x00 + end_lm_addr(%ebp)
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movl $FLAT_CODE_SEG, %eax
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movl %eax, 0x04 + end_lm_addr(%ebp)
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/* Enable PAE mode */
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movl %cr4, %eax
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orl $X86_CR4_PAE, %eax
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movl %eax, %cr4
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/* Enable long mode */
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movl $MSR_K6_EFER, %ecx
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rdmsr
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orl $EFER_LME, %eax
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wrmsr
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/* Start paging, entering 32bit compatiblity mode */
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movl %cr0, %eax
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orl $CR0_PG, %eax
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movl %eax, %cr0
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/* Enter 64bit long mode */
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ljmp *start_lm_addr(%ebp)
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.code64
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start_lm:
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/* Load 64bit data segments */
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movl $LM_DATA_SEG, %eax
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %ss
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andq $0xffffffff, %rbx
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/* Get the address to jump to */
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movl 20(%rbx), %edx
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andq $0xffffffff, %rdx
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/* Get the argument pointer */
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movl 24(%rbx), %ebx
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andq $0xffffffff, %rbx
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/* Jump to the 64bit code */
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call *%rdx
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/* Preserve the result */
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movl %eax, %edx
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/* Fixup %eflags */
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cli
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cld
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/* Switch to 32bit compatibility mode */
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ljmp *end_lm_addr(%rip)
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.code32
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end_lm:
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/* Disable paging */
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movl %cr0, %eax
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andl $~CR0_PG, %eax
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movl %eax, %cr0
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/* Disable long mode */
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movl $MSR_K6_EFER, %ecx
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rdmsr
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andl $~EFER_LME, %eax
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wrmsr
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/* Disable PAE */
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movl %cr4, %eax
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andl $~X86_CR4_PAE, %eax
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movl %eax, %cr4
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/* Compute virt_offset */
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popl %ebp
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/* Compute the original stack pointer + 16 */
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popl %ebx
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movl %ebx, %esp
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/* Enable the virtual addresses */
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leal _phys_to_virt(%ebp), %eax
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call *%eax
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/* Restore the callee save registers */
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popl %ebx
|
|
popl %esi
|
|
popl %edi
|
|
popl %ebp
|
|
|
|
/* Get the C return value */
|
|
movl %edx, %eax
|
|
|
|
/* Return */
|
|
ret
|
|
|
|
.arch i386
|
|
#endif /* CONFIG_X86_64 */
|
|
|
|
/**************************************************************************
|
|
SETJMP - Save stack context for non-local goto
|
|
**************************************************************************/
|
|
.globl setjmp
|
|
setjmp:
|
|
movl 4(%esp),%ecx /* jmpbuf */
|
|
movl 0(%esp),%edx /* return address */
|
|
movl %edx,0(%ecx)
|
|
movl %ebx,4(%ecx)
|
|
movl %esp,8(%ecx)
|
|
movl %ebp,12(%ecx)
|
|
movl %esi,16(%ecx)
|
|
movl %edi,20(%ecx)
|
|
movl $0,%eax
|
|
ret
|
|
|
|
/**************************************************************************
|
|
LONGJMP - Non-local jump to a saved stack context
|
|
**************************************************************************/
|
|
.globl longjmp
|
|
longjmp:
|
|
movl 4(%esp),%edx /* jumpbuf */
|
|
movl 8(%esp),%eax /* result */
|
|
movl 0(%edx),%ecx
|
|
movl 4(%edx),%ebx
|
|
movl 8(%edx),%esp
|
|
movl 12(%edx),%ebp
|
|
movl 16(%edx),%esi
|
|
movl 20(%edx),%edi
|
|
cmpl $0,%eax
|
|
jne 1f
|
|
movl $1,%eax
|
|
1: movl %ecx,0(%esp)
|
|
ret
|
|
|
|
/**************************************************************************
|
|
_VIRT_TO_PHYS - Transition from virtual to physical addresses
|
|
Preserves all preservable registers and flags
|
|
**************************************************************************/
|
|
.globl _virt_to_phys
|
|
_virt_to_phys:
|
|
pushfl
|
|
pushl %ebp
|
|
pushl %eax
|
|
movl virt_offset, %ebp /* Load virt_offset */
|
|
addl %ebp, 12(%esp) /* Adjust the return address */
|
|
|
|
/* reload the code segment */
|
|
pushl $FLAT_CODE_SEG
|
|
leal 1f(%ebp), %eax
|
|
pushl %eax
|
|
lret
|
|
|
|
1:
|
|
/* reload other segment registers */
|
|
movl $FLAT_DATA_SEG, %eax
|
|
movl %eax, %ds
|
|
movl %eax, %es
|
|
movl %eax, %ss
|
|
addl %ebp, %esp /* Adjust the stack pointer */
|
|
movl %eax, %fs
|
|
movl %eax, %gs
|
|
|
|
popl %eax
|
|
popl %ebp
|
|
popfl
|
|
ret
|
|
|
|
|
|
/**************************************************************************
|
|
_PHYS_TO_VIRT - Transition from using physical to virtual addresses
|
|
Preserves all preservable registers and flags
|
|
**************************************************************************/
|
|
.globl _phys_to_virt
|
|
_phys_to_virt:
|
|
pushfl
|
|
pushl %ebp
|
|
pushl %eax
|
|
|
|
call 1f
|
|
1: popl %ebp
|
|
subl $1b, %ebp
|
|
movl %ebp, virt_offset(%ebp)
|
|
|
|
/* Fixup the gdt */
|
|
leal _pmcs(%ebp), %eax
|
|
pushl %eax
|
|
pushl %ebp
|
|
call set_seg_base
|
|
addl $8, %esp
|
|
|
|
/* Fixup gdtarg */
|
|
leal _gdt(%ebp), %eax
|
|
movl %eax, (gdtarg+2)(%ebp)
|
|
|
|
/* Load the global descriptor table */
|
|
cli
|
|
lgdt %cs:gdtarg(%ebp)
|
|
ljmp $KERN_CODE_SEG, $1f
|
|
1:
|
|
/* reload other segment regsters */
|
|
movl $KERN_DATA_SEG, %eax
|
|
movl %eax, %ds
|
|
movl %eax, %es
|
|
movl %eax, %ss
|
|
subl %ebp, %esp /* Adjust the stack pointer */
|
|
movl %eax, %fs
|
|
movl %eax, %gs
|
|
|
|
subl %ebp, 12(%esp) /* Adjust the return address */
|
|
popl %eax
|
|
popl %ebp
|
|
popfl
|
|
ret
|
|
|
|
|
|
/**************************************************************************
|
|
SET_SEG_BASE - Set the base address of a segment register
|
|
**************************************************************************/
|
|
.globl set_seg_base
|
|
set_seg_base:
|
|
pushl %eax
|
|
pushl %ebx
|
|
movl 12(%esp), %eax /* %eax = base address */
|
|
movl 16(%esp), %ebx /* %ebx = &code_descriptor */
|
|
movw %ax, (0+2)(%ebx) /* CS base bits 0-15 */
|
|
movw %ax, (8+2)(%ebx) /* DS base bits 0-15 */
|
|
shrl $16, %eax
|
|
movb %al, (0+4)(%ebx) /* CS base bits 16-23 */
|
|
movb %al, (8+4)(%ebx) /* DS base bits 16-23 */
|
|
movb %ah, (0+7)(%ebx) /* CS base bits 24-31 */
|
|
movb %ah, (8+7)(%ebx) /* DS base bits 24-31 */
|
|
popl %ebx
|
|
popl %eax
|
|
ret
|
|
|
|
/**************************************************************************
|
|
GLOBAL DESCRIPTOR TABLE
|
|
**************************************************************************/
|
|
.data
|
|
.align 4
|
|
|
|
.globl _gdt
|
|
.globl gdtarg
|
|
_gdt:
|
|
gdtarg:
|
|
.word _gdt_end - _gdt - 1 /* limit */
|
|
.long _gdt /* addr */
|
|
.word 0
|
|
|
|
.globl _pmcs
|
|
_pmcs:
|
|
/* 32 bit protected mode code segment */
|
|
.word 0xffff,0
|
|
.byte 0,0x9f,0xcf,0
|
|
|
|
_pmds:
|
|
/* 32 bit protected mode data segment */
|
|
.word 0xffff,0
|
|
.byte 0,0x93,0xcf,0
|
|
|
|
_rmcs:
|
|
/* 16 bit real mode code segment */
|
|
.word 0xffff,(0&0xffff)
|
|
.byte (0>>16),0x9b,0x00,(0>>24)
|
|
|
|
_rmds:
|
|
/* 16 bit real mode data segment */
|
|
.word 0xffff,(0&0xffff)
|
|
.byte (0>>16),0x93,0x00,(0>>24)
|
|
|
|
_pmcs2:
|
|
/* 32 bit protected mode code segment, base 0 */
|
|
.word 0xffff,0
|
|
.byte 0,0x9f,0xcf,0
|
|
|
|
_pmds2:
|
|
/* 32 bit protected mode data segment, base 0 */
|
|
.word 0xffff,0
|
|
.byte 0,0x93,0xcf,0
|
|
|
|
#ifdef CONFIG_X86_64
|
|
_lmcs:
|
|
/* 64bit long mode code segment, base 0 */
|
|
.word 0xffff, 0
|
|
.byte 0x00, 0x9f, 0xaf , 0x00
|
|
_lmds:
|
|
/* 64bit long mode data segment, base 0 */
|
|
.word 0xffff, 0
|
|
.byte 0x00, 0x93, 0xcf, 0x00
|
|
#endif
|
|
_gdt_end:
|
|
|
|
/* The initial register contents */
|
|
.balign 4
|
|
.globl initial_regs
|
|
initial_regs:
|
|
.fill 8, 4, 0
|
|
|
|
/* The virtual address offset */
|
|
.globl virt_offset
|
|
virt_offset:
|
|
.long 0
|
|
|
|
.section ".stack"
|
|
.p2align 3
|
|
/* allocate a 4K stack in the stack segment */
|
|
.globl _stack
|
|
_stack:
|
|
.space 4096
|
|
.globl _estack
|
|
_estack:
|
|
#ifdef CONFIG_X86_64
|
|
.section ".bss"
|
|
.p2align 12
|
|
/* Include a dummy space in case we are loaded badly aligned */
|
|
.space 4096
|
|
/* Reserve enough space for a page table convering 4GB with 2MB pages */
|
|
pgt_level4:
|
|
.space 4096
|
|
pgt_level3:
|
|
.space 4096
|
|
pgt_level2:
|
|
.space 16384
|
|
start_lm_addr:
|
|
.space 8
|
|
end_lm_addr:
|
|
.space 8
|
|
#endif
|