321 lines
6.9 KiB
ArmAsm
321 lines
6.9 KiB
ArmAsm
#include "virtaddr.h"
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.equ MSR_K6_EFER, 0xC0000080
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.equ EFER_LME, 0x00000100
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.equ X86_CR4_PAE, 0x00000020
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.equ CR0_PG, 0x80000000
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#ifdef GAS291
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#define DATA32 data32;
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#define ADDR32 addr32;
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#define LJMPI(x) ljmp x
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#else
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#define DATA32 data32
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#define ADDR32 addr32
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/* newer GAS295 require #define LJMPI(x) ljmp *x */
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#define LJMPI(x) ljmp x
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#endif
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/*
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* NOTE: if you write a subroutine that is called from C code (gcc/egcs),
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* then you only have to take care of %ebx, %esi, %edi and %ebp. These
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* registers must not be altered under any circumstance. All other registers
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* may be clobbered without any negative side effects. If you don't follow
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* this rule then you'll run into strange effects that only occur on some
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* gcc versions (because the register allocator may use different registers).
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*
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* All the data32 prefixes for the ljmp instructions are necessary, because
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* the assembler emits code with a relocation address of 0. This means that
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* all destinations are initially negative, which the assembler doesn't grok,
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* because for some reason negative numbers don't fit into 16 bits. The addr32
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* prefixes are there for the same reasons, because otherwise the memory
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* references are only 16 bit wide. Theoretically they are all superfluous.
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* One last note about prefixes: the data32 prefixes on all call _real_to_prot
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* instructions could be removed if the _real_to_prot function is changed to
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* deal correctly with 16 bit return addresses. I tried it, but failed.
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*/
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.text
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.arch i386
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.code32
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/**************************************************************************
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XSTART32 - Transfer control to the kernel just loaded
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**************************************************************************/
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.globl xstart32
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xstart32:
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/* Save the callee save registers */
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movl %ebp, os_regs + 32
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movl %esi, os_regs + 36
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movl %edi, os_regs + 40
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movl %ebx, os_regs + 44
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/* save the return address */
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popl %eax
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movl %eax, os_regs + 48
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/* save the stack pointer */
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movl %esp, os_regs + 52
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/* Get the new destination address */
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popl %ecx
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/* Store the physical address of xend on the stack */
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movl $xend32, %ebx
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addl virt_offset, %ebx
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pushl %ebx
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/* Store the destination address on the stack */
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pushl $PHYSICAL_CS
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pushl %ecx
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/* Cache virt_offset */
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movl virt_offset, %ebp
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/* Switch to using physical addresses */
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call _virt_to_phys
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/* Save the target stack pointer */
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movl %esp, os_regs + 12(%ebp)
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leal os_regs(%ebp), %esp
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/* Store the pointer to os_regs */
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movl %esp, os_regs_ptr(%ebp)
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/* Load my new registers */
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popal
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movl (-32 + 12)(%esp), %esp
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/* Jump to the new kernel
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* The lret switches to a flat code segment
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*/
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lret
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.balign 4
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.globl xend32
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xend32:
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/* Fixup %eflags */
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nop
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cli
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cld
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/* Load %esp with &os_regs + virt_offset */
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.byte 0xbc /* movl $0, %esp */
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os_regs_ptr:
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.long 0
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/* Save the result registers */
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addl $32, %esp
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pushal
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/* Compute virt_offset */
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movl %esp, %ebp
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subl $os_regs, %ebp
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/* Load the stack pointer */
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movl 52(%esp), %esp
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/* Enable the virtual addresses */
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leal _phys_to_virt(%ebp), %eax
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call *%eax
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/* Restore the callee save registers */
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movl os_regs + 32, %ebp
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movl os_regs + 36, %esi
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movl os_regs + 40, %edi
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movl os_regs + 44, %ebx
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movl os_regs + 48, %edx
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movl os_regs + 52, %esp
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/* Get the C return value */
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movl os_regs + 28, %eax
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jmpl *%edx
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#ifdef CONFIG_X86_64
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.arch sledgehammer
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/**************************************************************************
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XSTART_lm - Transfer control to the kernel just loaded in long mode
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**************************************************************************/
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.globl xstart_lm
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xstart_lm:
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/* Save the callee save registers */
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pushl %ebp
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pushl %esi
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pushl %edi
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pushl %ebx
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/* Cache virt_offset && (virt_offset & 0xfffff000) */
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movl virt_offset, %ebp
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movl %ebp, %ebx
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andl $0xfffff000, %ebx
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/* Switch to using physical addresses */
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call _virt_to_phys
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/* Initialize the page tables */
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/* Level 4 */
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leal 0x23 + pgt_level3(%ebx), %eax
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leal pgt_level4(%ebx), %edi
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movl %eax, (%edi)
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/* Level 3 */
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leal 0x23 + pgt_level2(%ebx), %eax
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leal pgt_level3(%ebx), %edi
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movl %eax, 0x00(%edi)
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addl $4096, %eax
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movl %eax, 0x08(%edi)
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addl $4096, %eax
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movl %eax, 0x10(%edi)
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addl $4096, %eax
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movl %eax, 0x18(%edi)
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/* Level 2 */
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movl $0xe3, %eax
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leal pgt_level2(%ebx), %edi
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leal 16384(%edi), %esi
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pgt_level2_loop:
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movl %eax, (%edi)
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addl $8, %edi
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addl $0x200000, %eax
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cmp %esi, %edi
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jne pgt_level2_loop
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/* Point at the x86_64 page tables */
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leal pgt_level4(%ebx), %edi
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movl %edi, %cr3
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/* Setup for the return from 64bit mode */
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/* 64bit align the stack */
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movl %esp, %ebx /* original stack pointer + 16 */
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andl $0xfffffff8, %esp
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/* Save original stack pointer + 16 */
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pushl %ebx
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/* Save virt_offset */
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pushl %ebp
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/* Setup for the jmp to 64bit long mode */
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leal start_lm(%ebp), %eax
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movl %eax, 0x00 + start_lm_addr(%ebp)
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movl $LM_CODE_SEG, %eax
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movl %eax, 0x04 + start_lm_addr(%ebp)
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/* Setup for the jump out of 64bit long mode */
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leal end_lm(%ebp), %eax
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movl %eax, 0x00 + end_lm_addr(%ebp)
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movl $FLAT_CODE_SEG, %eax
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movl %eax, 0x04 + end_lm_addr(%ebp)
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/* Enable PAE mode */
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movl %cr4, %eax
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orl $X86_CR4_PAE, %eax
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movl %eax, %cr4
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/* Enable long mode */
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movl $MSR_K6_EFER, %ecx
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rdmsr
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orl $EFER_LME, %eax
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wrmsr
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/* Start paging, entering 32bit compatiblity mode */
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movl %cr0, %eax
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orl $CR0_PG, %eax
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movl %eax, %cr0
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/* Enter 64bit long mode */
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ljmp *start_lm_addr(%ebp)
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.code64
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start_lm:
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/* Load 64bit data segments */
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movl $LM_DATA_SEG, %eax
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %ss
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andq $0xffffffff, %rbx
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/* Get the address to jump to */
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movl 20(%rbx), %edx
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andq $0xffffffff, %rdx
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/* Get the argument pointer */
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movl 24(%rbx), %ebx
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andq $0xffffffff, %rbx
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/* Jump to the 64bit code */
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call *%rdx
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/* Preserve the result */
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movl %eax, %edx
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/* Fixup %eflags */
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cli
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cld
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/* Switch to 32bit compatibility mode */
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ljmp *end_lm_addr(%rip)
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.code32
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end_lm:
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/* Disable paging */
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movl %cr0, %eax
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andl $~CR0_PG, %eax
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movl %eax, %cr0
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/* Disable long mode */
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movl $MSR_K6_EFER, %ecx
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rdmsr
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andl $~EFER_LME, %eax
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wrmsr
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/* Disable PAE */
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movl %cr4, %eax
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andl $~X86_CR4_PAE, %eax
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movl %eax, %cr4
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/* Compute virt_offset */
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popl %ebp
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/* Compute the original stack pointer + 16 */
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popl %ebx
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movl %ebx, %esp
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/* Enable the virtual addresses */
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leal _phys_to_virt(%ebp), %eax
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call *%eax
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/* Restore the callee save registers */
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popl %ebx
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popl %esi
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popl %edi
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popl %ebp
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/* Get the C return value */
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movl %edx, %eax
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/* Return */
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ret
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.arch i386
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#endif /* CONFIG_X86_64 */
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#ifdef CONFIG_X86_64
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.section ".bss"
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.p2align 12
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/* Include a dummy space in case we are loaded badly aligned */
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.space 4096
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/* Reserve enough space for a page table convering 4GB with 2MB pages */
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pgt_level4:
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.space 4096
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pgt_level3:
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.space 4096
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pgt_level2:
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.space 16384
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start_lm_addr:
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.space 8
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end_lm_addr:
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.space 8
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#endif
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