201 lines
5.4 KiB
C
201 lines
5.4 KiB
C
#ifndef _MYSON_H
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#define _MYSON_H
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/** @file
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*
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* Myson Technology network card driver
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <stdint.h>
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#include <ipxe/if_ether.h>
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/** BAR size */
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#define MYSON_BAR_SIZE 256
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/** A packet descriptor */
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struct myson_descriptor {
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/** Status */
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uint32_t status;
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/** Control */
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uint32_t control;
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/** Buffer start address */
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uint32_t address;
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/** Next descriptor address */
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uint32_t next;
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} __attribute__ (( packed ));
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/* Transmit status */
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#define MYSON_TX_STAT_OWN 0x80000000UL /**< Owner */
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#define MYSON_TX_STAT_ABORT 0x00002000UL /**< Abort */
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#define MYSON_TX_STAT_CSL 0x00001000UL /**< Carrier sense lost */
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/* Transmit control */
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#define MYSON_TX_CTRL_IC 0x80000000UL /**< Interrupt control */
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#define MYSON_TX_CTRL_LD 0x20000000UL /**< Last descriptor */
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#define MYSON_TX_CTRL_FD 0x10000000UL /**< First descriptor */
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#define MYSON_TX_CTRL_CRC 0x08000000UL /**< CRC append */
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#define MYSON_TX_CTRL_PAD 0x04000000UL /**< Pad control */
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#define MYSON_TX_CTRL_RTLC 0x02000000UL /**< Retry late collision */
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#define MYSON_TX_CTRL_PKTS(x) ( (x) << 11 ) /**< Packet size */
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#define MYSON_TX_CTRL_TBS(x) ( (x) << 0 ) /**< Transmit buffer size */
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/* Receive status */
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#define MYSON_RX_STAT_OWN 0x80000000UL /**< Owner */
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#define MYSON_RX_STAT_FLNG(status) ( ( (status) >> 16 ) & 0xfff )
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#define MYSON_RX_STAT_ES 0x00000080UL /**< Error summary */
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/* Receive control */
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#define MYSON_RX_CTRL_RBS(x) ( (x) << 0 ) /**< Receive buffer size */
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/** Descriptor ring alignment */
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#define MYSON_RING_ALIGN 4
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/** Physical Address Register 0 */
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#define MYSON_PAR0 0x00
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/** Physical Address Register 4 */
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#define MYSON_PAR4 0x04
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/** Physical address */
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union myson_physical_address {
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struct {
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uint32_t low;
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uint32_t high;
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} __attribute__ (( packed )) reg;
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uint8_t raw[ETH_ALEN];
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};
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/** Transmit and Receive Configuration Register */
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#define MYSON_TCR_RCR 0x18
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#define MYSON_TCR_TXS 0x80000000UL /**< Transmit status */
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#define MYSON_TCR_TE 0x00040000UL /**< Transmit enable */
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#define MYSON_RCR_RXS 0x00008000UL /**< Receive status */
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#define MYSON_RCR_PROM 0x00000080UL /**< Promiscuous mode */
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#define MYSON_RCR_AB 0x00000040UL /**< Accept broadcast */
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#define MYSON_RCR_AM 0x00000020UL /**< Accept multicast */
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#define MYSON_RCR_ARP 0x00000008UL /**< Accept runt packet */
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#define MYSON_RCR_ALP 0x00000004UL /**< Accept long packet */
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#define MYSON_RCR_RE 0x00000001UL /**< Receive enable */
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/** Maximum time to wait for transmit and receive to be idle, in milliseconds */
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#define MYSON_IDLE_MAX_WAIT_MS 100
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/** Bus Command Register */
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#define MYSON_BCR 0x1c
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#define MYSON_BCR_RLE 0x00000100UL /**< Read line enable */
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#define MYSON_BCR_RME 0x00000080UL /**< Read multiple enable */
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#define MYSON_BCR_WIE 0x00000040UL /**< Write and invalidate */
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#define MYSON_BCR_PBL(x) ( (x) << 3 ) /**< Burst length */
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#define MYSON_BCR_PBL_MASK MYSON_BCR_PBL ( 0x7 )
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#define MYSON_BCR_PBL_DEFAULT MYSON_BCR_PBL ( 0x6 )
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#define MYSON_BCR_SWR 0x00000001UL /**< Software reset */
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/** Maximum time to wait for a reset, in milliseconds */
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#define MYSON_RESET_MAX_WAIT_MS 100
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/** Transmit Poll Demand Register */
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#define MYSON_TXPDR 0x20
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/** Receive Poll Demand Register */
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#define MYSON_RXPDR 0x24
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/** Transmit List Base Address */
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#define MYSON_TXLBA 0x2c
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/** Number of transmit descriptors */
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#define MYSON_NUM_TX_DESC 4
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/** Receive List Base Address */
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#define MYSON_RXLBA 0x30
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/** Number of receive descriptors */
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#define MYSON_NUM_RX_DESC 4
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/** Receive buffer length */
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#define MYSON_RX_MAX_LEN ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )
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/** Interrupt Status Register */
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#define MYSON_ISR 0x34
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#define MYSON_IRQ_TI 0x00000008UL /**< Transmit interrupt */
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#define MYSON_IRQ_RI 0x00000004UL /**< Receive interrupt */
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/** Number of I/O delays between ISR reads */
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#define MYSON_ISR_IODELAY_COUNT 4
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/** Interrupt Mask Register */
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#define MYSON_IMR 0x38
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/** Boot ROM / EEPROM / MII Management Register */
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#define MYSON_ROM_MII 0x40
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#define MYSON_ROM_AUTOLD 0x00100000UL /**< Auto load */
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/** Maximum time to wait for a configuration reload, in milliseconds */
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#define MYSON_AUTOLD_MAX_WAIT_MS 100
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/** A Myson descriptor ring */
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struct myson_ring {
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/** Descriptors */
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struct myson_descriptor *desc;
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/** Producer index */
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unsigned int prod;
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/** Consumer index */
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unsigned int cons;
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/** Number of descriptors */
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unsigned int count;
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/** Descriptor start address register */
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unsigned int reg;
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};
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/**
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* Initialise descriptor ring
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*
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* @v ring Descriptor ring
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* @v count Number of descriptors
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* @v reg Descriptor base address register
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*/
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static inline __attribute__ (( always_inline)) void
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myson_init_ring ( struct myson_ring *ring, unsigned int count,
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unsigned int reg ) {
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ring->count = count;
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ring->reg = reg;
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}
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/** A myson network card */
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struct myson_nic {
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/** Registers */
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void *regs;
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/** Transmit descriptor ring */
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struct myson_ring tx;
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/** Receive descriptor ring */
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struct myson_ring rx;
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/** Receive I/O buffers */
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struct io_buffer *rx_iobuf[MYSON_NUM_RX_DESC];
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};
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/**
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* Check if card can access physical address
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*
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* @v address Physical address
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* @v address_ok Card can access physical address
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*/
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static inline __attribute__ (( always_inline )) int
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myson_address_ok ( physaddr_t address ) {
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/* In a 32-bit build, all addresses can be accessed */
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if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
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return 1;
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/* Card can access all addresses below 4GB */
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if ( ( address & ~0xffffffffULL ) == 0 )
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return 1;
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return 0;
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}
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#endif /* _MYSON_H */
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