660 lines
18 KiB
C
660 lines
18 KiB
C
#ifndef _ARBEL_H
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#define _ARBEL_H
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/** @file
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*
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* Mellanox Arbel Infiniband HCA driver
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <stdint.h>
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#include <ipxe/uaccess.h>
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#include <ipxe/ib_packet.h>
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#include "mlx_bitops.h"
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#include "MT25218_PRM.h"
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/*
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* Hardware constants
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*
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*/
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/* Ports in existence */
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#define ARBEL_NUM_PORTS 2
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#define ARBEL_PORT_BASE 1
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/* PCI BARs */
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#define ARBEL_PCI_CONFIG_BAR PCI_BASE_ADDRESS_0
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#define ARBEL_PCI_CONFIG_BAR_SIZE 0x100000
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#define ARBEL_PCI_UAR_BAR PCI_BASE_ADDRESS_2
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#define ARBEL_PCI_UAR_IDX 1
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#define ARBEL_PCI_UAR_SIZE 0x1000
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/* Device reset */
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#define ARBEL_RESET_OFFSET 0x0f0010
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#define ARBEL_RESET_MAGIC 0x01000000UL
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#define ARBEL_RESET_WAIT_TIME_MS 1000
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/* UAR context table (UCE) resource types */
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#define ARBEL_UAR_RES_NONE 0x00
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#define ARBEL_UAR_RES_CQ_CI 0x01
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#define ARBEL_UAR_RES_CQ_ARM 0x02
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#define ARBEL_UAR_RES_SQ 0x03
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#define ARBEL_UAR_RES_RQ 0x04
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#define ARBEL_UAR_RES_GROUP_SEP 0x07
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/* Work queue entry and completion queue entry opcodes */
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#define ARBEL_OPCODE_SEND 0x0a
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#define ARBEL_OPCODE_RECV_ERROR 0xfe
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#define ARBEL_OPCODE_SEND_ERROR 0xff
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/* HCA command register opcodes */
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#define ARBEL_HCR_QUERY_DEV_LIM 0x0003
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#define ARBEL_HCR_QUERY_FW 0x0004
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#define ARBEL_HCR_INIT_HCA 0x0007
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#define ARBEL_HCR_CLOSE_HCA 0x0008
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#define ARBEL_HCR_INIT_IB 0x0009
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#define ARBEL_HCR_CLOSE_IB 0x000a
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#define ARBEL_HCR_SW2HW_MPT 0x000d
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#define ARBEL_HCR_MAP_EQ 0x0012
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#define ARBEL_HCR_SW2HW_EQ 0x0013
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#define ARBEL_HCR_HW2SW_EQ 0x0014
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#define ARBEL_HCR_SW2HW_CQ 0x0016
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#define ARBEL_HCR_HW2SW_CQ 0x0017
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#define ARBEL_HCR_QUERY_CQ 0x0018
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#define ARBEL_HCR_RST2INIT_QPEE 0x0019
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#define ARBEL_HCR_INIT2RTR_QPEE 0x001a
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#define ARBEL_HCR_RTR2RTS_QPEE 0x001b
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#define ARBEL_HCR_RTS2RTS_QPEE 0x001c
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#define ARBEL_HCR_2RST_QPEE 0x0021
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#define ARBEL_HCR_QUERY_QPEE 0x0022
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#define ARBEL_HCR_CONF_SPECIAL_QP 0x0023
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#define ARBEL_HCR_MAD_IFC 0x0024
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#define ARBEL_HCR_READ_MGM 0x0025
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#define ARBEL_HCR_WRITE_MGM 0x0026
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#define ARBEL_HCR_MGID_HASH 0x0027
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#define ARBEL_HCR_RUN_FW 0x0ff6
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#define ARBEL_HCR_DISABLE_LAM 0x0ff7
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#define ARBEL_HCR_ENABLE_LAM 0x0ff8
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#define ARBEL_HCR_UNMAP_ICM 0x0ff9
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#define ARBEL_HCR_MAP_ICM 0x0ffa
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#define ARBEL_HCR_UNMAP_ICM_AUX 0x0ffb
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#define ARBEL_HCR_MAP_ICM_AUX 0x0ffc
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#define ARBEL_HCR_SET_ICM_SIZE 0x0ffd
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#define ARBEL_HCR_UNMAP_FA 0x0ffe
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#define ARBEL_HCR_MAP_FA 0x0fff
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/* Service types */
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#define ARBEL_ST_RC 0x00
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#define ARBEL_ST_UD 0x03
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#define ARBEL_ST_MLX 0x07
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/* MTUs */
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#define ARBEL_MTU_2048 0x04
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#define ARBEL_NO_EQ 64
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#define ARBEL_INVALID_LKEY 0x00000100UL
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#define ARBEL_PAGE_SIZE ( ( size_t ) 4096 )
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#define ARBEL_RDB_ENTRY_SIZE ( ( size_t ) 32 )
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#define ARBEL_DB_POST_SND_OFFSET 0x10
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#define ARBEL_DB_EQ_OFFSET(_eqn) ( 0x08 * (_eqn) )
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#define ARBEL_QPEE_OPT_PARAM_QKEY 0x00000020UL
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#define ARBEL_MAP_EQ ( 0UL << 31 )
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#define ARBEL_UNMAP_EQ ( 1UL << 31 )
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#define ARBEL_EV_PORT_STATE_CHANGE 0x09
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#define ARBEL_LOG_MULTICAST_HASH_SIZE 3
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#define ARBEL_PM_STATE_ARMED 0x00
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#define ARBEL_PM_STATE_REARM 0x01
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#define ARBEL_PM_STATE_MIGRATED 0x03
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#define ARBEL_RETRY_MAX 0x07
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/*
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* Datatypes that seem to be missing from the autogenerated documentation
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*
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*/
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struct arbelprm_mgm_hash_st {
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pseudo_bit_t reserved0[0x00020];
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/* -------------- */
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pseudo_bit_t hash[0x00010];
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pseudo_bit_t reserved1[0x00010];
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} __attribute__ (( packed ));
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struct arbelprm_scalar_parameter_st {
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pseudo_bit_t reserved0[0x00020];
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/* -------------- */
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pseudo_bit_t value[0x00020];
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} __attribute__ (( packed ));
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struct arbelprm_event_mask_st {
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pseudo_bit_t reserved0[0x00020];
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/* -------------- */
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pseudo_bit_t completion[0x00001];
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pseudo_bit_t path_migration_succeeded[0x00001];
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pseudo_bit_t communication_established[0x00001];
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pseudo_bit_t send_queue_drained[0x00001];
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pseudo_bit_t cq_error[0x00001];
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pseudo_bit_t wq_catastrophe[0x00001];
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pseudo_bit_t qpc_catastrophe[0x00001];
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pseudo_bit_t path_migration_failed[0x00001];
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pseudo_bit_t reserved1[0x00001];
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pseudo_bit_t port_state_change[0x00001];
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pseudo_bit_t command_done[0x00001];
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pseudo_bit_t reserved2[0x00005];
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pseudo_bit_t wq_invalid_request[0x00001];
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pseudo_bit_t wq_access_violation[0x00001];
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pseudo_bit_t srq_catastrophe[0x00001];
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pseudo_bit_t srq_last_wqe[0x00001];
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pseudo_bit_t srq_rq_limit[0x00001];
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pseudo_bit_t gpio[0x00001];
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pseudo_bit_t clientreregister[0x00001];
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pseudo_bit_t path_migration_armed[0x00001];
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pseudo_bit_t reserved3[0x00008];
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} __attribute__ (( packed ));
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struct arbelprm_eq_set_ci_st {
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pseudo_bit_t ci[0x00020];
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} __attribute__ (( packed ));
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struct arbelprm_port_state_change_event_st {
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pseudo_bit_t reserved[0x00020];
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struct arbelprm_port_state_change_st data;
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} __attribute__ (( packed ));
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/*
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* Wrapper structures for hardware datatypes
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*
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*/
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struct MLX_DECLARE_STRUCT ( arbelprm_access_lam );
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struct MLX_DECLARE_STRUCT ( arbelprm_completion_queue_context );
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struct MLX_DECLARE_STRUCT ( arbelprm_completion_queue_entry );
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struct MLX_DECLARE_STRUCT ( arbelprm_completion_with_error );
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struct MLX_DECLARE_STRUCT ( arbelprm_cq_arm_db_record );
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struct MLX_DECLARE_STRUCT ( arbelprm_cq_ci_db_record );
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struct MLX_DECLARE_STRUCT ( arbelprm_event_mask );
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struct MLX_DECLARE_STRUCT ( arbelprm_event_queue_entry );
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struct MLX_DECLARE_STRUCT ( arbelprm_eq_set_ci );
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struct MLX_DECLARE_STRUCT ( arbelprm_eqc );
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struct MLX_DECLARE_STRUCT ( arbelprm_hca_command_register );
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struct MLX_DECLARE_STRUCT ( arbelprm_init_hca );
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struct MLX_DECLARE_STRUCT ( arbelprm_init_ib );
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struct MLX_DECLARE_STRUCT ( arbelprm_mad_ifc );
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struct MLX_DECLARE_STRUCT ( arbelprm_mgm_entry );
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struct MLX_DECLARE_STRUCT ( arbelprm_mgm_hash );
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struct MLX_DECLARE_STRUCT ( arbelprm_mpt );
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struct MLX_DECLARE_STRUCT ( arbelprm_port_state_change_event );
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struct MLX_DECLARE_STRUCT ( arbelprm_qp_db_record );
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struct MLX_DECLARE_STRUCT ( arbelprm_qp_ee_state_transitions );
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struct MLX_DECLARE_STRUCT ( arbelprm_query_dev_lim );
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struct MLX_DECLARE_STRUCT ( arbelprm_query_fw );
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struct MLX_DECLARE_STRUCT ( arbelprm_queue_pair_ee_context_entry );
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struct MLX_DECLARE_STRUCT ( arbelprm_recv_wqe_segment_next );
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struct MLX_DECLARE_STRUCT ( arbelprm_scalar_parameter );
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struct MLX_DECLARE_STRUCT ( arbelprm_send_doorbell );
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struct MLX_DECLARE_STRUCT ( arbelprm_ud_address_vector );
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struct MLX_DECLARE_STRUCT ( arbelprm_virtual_physical_mapping );
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struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_ctrl_mlx );
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struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_ctrl_send );
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struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_data_ptr );
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struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_next );
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struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_ud );
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/*
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* Composite hardware datatypes
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*
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*/
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#define ARBEL_MAX_GATHER 2
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struct arbelprm_ud_send_wqe {
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struct arbelprm_wqe_segment_next next;
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struct arbelprm_wqe_segment_ctrl_send ctrl;
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struct arbelprm_wqe_segment_ud ud;
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struct arbelprm_wqe_segment_data_ptr data[ARBEL_MAX_GATHER];
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} __attribute__ (( packed ));
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struct arbelprm_mlx_send_wqe {
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struct arbelprm_wqe_segment_next next;
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struct arbelprm_wqe_segment_ctrl_mlx ctrl;
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struct arbelprm_wqe_segment_data_ptr data[ARBEL_MAX_GATHER];
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uint8_t headers[IB_MAX_HEADER_SIZE];
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} __attribute__ (( packed ));
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struct arbelprm_rc_send_wqe {
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struct arbelprm_wqe_segment_next next;
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struct arbelprm_wqe_segment_ctrl_send ctrl;
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struct arbelprm_wqe_segment_data_ptr data[ARBEL_MAX_GATHER];
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} __attribute__ (( packed ));
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#define ARBEL_MAX_SCATTER 2
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struct arbelprm_recv_wqe {
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/* The autogenerated header is inconsistent between send and
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* receive WQEs. The "ctrl" structure for receive WQEs is
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* defined to include the "next" structure. Since the "ctrl"
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* part of the "ctrl" structure contains only "reserved, must
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* be zero" bits, we ignore its definition and provide
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* something more usable.
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*/
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struct arbelprm_recv_wqe_segment_next next;
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uint32_t ctrl[2]; /* All "reserved, must be zero" */
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struct arbelprm_wqe_segment_data_ptr data[ARBEL_MAX_SCATTER];
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} __attribute__ (( packed ));
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union arbelprm_completion_entry {
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struct arbelprm_completion_queue_entry normal;
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struct arbelprm_completion_with_error error;
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} __attribute__ (( packed ));
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union arbelprm_event_entry {
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struct arbelprm_event_queue_entry generic;
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struct arbelprm_port_state_change_event port_state_change;
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} __attribute__ (( packed ));
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union arbelprm_doorbell_record {
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struct arbelprm_cq_arm_db_record cq_arm;
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struct arbelprm_cq_ci_db_record cq_ci;
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struct arbelprm_qp_db_record qp;
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} __attribute__ (( packed ));
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union arbelprm_doorbell_register {
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struct arbelprm_send_doorbell send;
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uint32_t dword[2];
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} __attribute__ (( packed ));
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union arbelprm_eq_doorbell_register {
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struct arbelprm_eq_set_ci ci;
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uint32_t dword[1];
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} __attribute__ (( packed ));
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union arbelprm_mad {
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struct arbelprm_mad_ifc ifc;
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union ib_mad mad;
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} __attribute__ (( packed ));
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/*
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* iPXE-specific definitions
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*
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*/
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/** Arbel device limits */
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struct arbel_dev_limits {
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/** Number of reserved QPs */
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unsigned int reserved_qps;
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/** QP context entry size */
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size_t qpc_entry_size;
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/** Extended QP context entry size */
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size_t eqpc_entry_size;
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/** Number of reserved SRQs */
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unsigned int reserved_srqs;
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/** SRQ context entry size */
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size_t srqc_entry_size;
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/** Number of reserved EEs */
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unsigned int reserved_ees;
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/** EE context entry size */
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size_t eec_entry_size;
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/** Extended EE context entry size */
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size_t eeec_entry_size;
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/** Number of reserved CQs */
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unsigned int reserved_cqs;
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/** CQ context entry size */
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size_t cqc_entry_size;
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/** Number of reserved EQs */
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unsigned int reserved_eqs;
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/** Number of reserved MTTs */
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unsigned int reserved_mtts;
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/** MTT entry size */
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size_t mtt_entry_size;
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/** Number of reserved MRWs */
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unsigned int reserved_mrws;
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/** MPT entry size */
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size_t mpt_entry_size;
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/** Number of reserved RDBs */
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unsigned int reserved_rdbs;
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/** EQ context entry size */
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size_t eqc_entry_size;
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/** Number of reserved UARs */
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unsigned int reserved_uars;
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/** UAR scratchpad entry size */
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size_t uar_scratch_entry_size;
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};
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/** Alignment of Arbel send work queue entries */
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#define ARBEL_SEND_WQE_ALIGN 128
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/** An Arbel send work queue entry */
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union arbel_send_wqe {
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struct arbelprm_wqe_segment_next next;
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struct arbelprm_ud_send_wqe ud;
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struct arbelprm_mlx_send_wqe mlx;
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struct arbelprm_rc_send_wqe rc;
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uint8_t force_align[ARBEL_SEND_WQE_ALIGN];
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} __attribute__ (( packed ));
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/** An Arbel send work queue */
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struct arbel_send_work_queue {
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/** Doorbell record number */
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unsigned int doorbell_idx;
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/** Work queue entries */
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union arbel_send_wqe *wqe;
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/** Size of work queue */
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size_t wqe_size;
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};
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/** Alignment of Arbel receive work queue entries */
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#define ARBEL_RECV_WQE_ALIGN 64
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/** An Arbel receive work queue entry */
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union arbel_recv_wqe {
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struct arbelprm_recv_wqe recv;
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uint8_t force_align[ARBEL_RECV_WQE_ALIGN];
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} __attribute__ (( packed ));
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/** An Arbel receive work queue */
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struct arbel_recv_work_queue {
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/** Doorbell record number */
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unsigned int doorbell_idx;
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/** Work queue entries */
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union arbel_recv_wqe *wqe;
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/** Size of work queue */
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size_t wqe_size;
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/** GRH buffers (if applicable) */
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struct ib_global_route_header *grh;
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/** Size of GRB buffers */
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size_t grh_size;
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};
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/** Number of special queue pairs */
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#define ARBEL_NUM_SPECIAL_QPS 4
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/** Number of queue pairs reserved for the "special QP" block
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*
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* The special QPs must be in (2n,2n+1) pairs, hence we need to
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* reserve one extra QP to allow for alignment.
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*/
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#define ARBEL_RSVD_SPECIAL_QPS ( ARBEL_NUM_SPECIAL_QPS + 1 )
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/** Maximum number of allocatable queue pairs
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*
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* This is a policy decision, not a device limit.
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*/
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#define ARBEL_MAX_QPS 8
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/** Queue pair number randomisation mask */
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#define ARBEL_QPN_RANDOM_MASK 0xfff000
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/** Arbel queue pair state */
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enum arbel_queue_pair_state {
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ARBEL_QP_ST_RST = 0,
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ARBEL_QP_ST_INIT,
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ARBEL_QP_ST_RTR,
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ARBEL_QP_ST_RTS,
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};
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/** An Arbel queue pair */
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struct arbel_queue_pair {
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/** Send work queue */
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struct arbel_send_work_queue send;
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/** Receive work queue */
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struct arbel_recv_work_queue recv;
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/** Queue state */
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enum arbel_queue_pair_state state;
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};
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/** Maximum number of allocatable completion queues
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*
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* This is a policy decision, not a device limit.
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*/
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#define ARBEL_MAX_CQS 8
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/** An Arbel completion queue */
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struct arbel_completion_queue {
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/** Consumer counter doorbell record number */
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unsigned int ci_doorbell_idx;
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/** Arm queue doorbell record number */
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unsigned int arm_doorbell_idx;
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/** Completion queue entries */
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union arbelprm_completion_entry *cqe;
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/** Size of completion queue */
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size_t cqe_size;
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};
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/** Maximum number of allocatable event queues
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*
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* This is a policy decision, not a device limit.
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*/
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#define ARBEL_MAX_EQS 64
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/** A Arbel event queue */
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struct arbel_event_queue {
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/** Event queue entries */
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union arbelprm_event_entry *eqe;
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/** Size of event queue */
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size_t eqe_size;
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/** Event queue number */
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unsigned long eqn;
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/** Next event queue entry index */
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unsigned long next_idx;
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/** Doorbell register */
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void *doorbell;
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};
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/** Number of event queue entries
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*
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* This is a policy decision.
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*/
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#define ARBEL_NUM_EQES 4
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|
|
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/** An Arbel resource bitmask */
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typedef uint32_t arbel_bitmask_t;
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|
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/** Size of an Arbel resource bitmask */
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#define ARBEL_BITMASK_SIZE(max_entries) \
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( ( (max_entries) + ( 8 * sizeof ( arbel_bitmask_t ) ) - 1 ) / \
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( 8 * sizeof ( arbel_bitmask_t ) ) )
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|
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/** An Arbel device */
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struct arbel {
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/** PCI device */
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struct pci_device *pci;
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/** PCI configuration registers */
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|
void *config;
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/** PCI user Access Region */
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|
void *uar;
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/** Event queue consumer index doorbells */
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void *eq_ci_doorbells;
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|
|
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/** Command input mailbox */
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void *mailbox_in;
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/** Command output mailbox */
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void *mailbox_out;
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|
|
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/** Device open request counter */
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unsigned int open_count;
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|
|
|
/** Firmware size */
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|
size_t firmware_len;
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/** Firmware area in external memory
|
|
*
|
|
* This is allocated when first needed, and freed only on
|
|
* final teardown, in order to avoid memory map changes at
|
|
* runtime.
|
|
*/
|
|
userptr_t firmware_area;
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/** ICM size */
|
|
size_t icm_len;
|
|
/** ICM AUX size */
|
|
size_t icm_aux_len;
|
|
/** ICM area
|
|
*
|
|
* This is allocated when first needed, and freed only on
|
|
* final teardown, in order to avoid memory map changes at
|
|
* runtime.
|
|
*/
|
|
userptr_t icm;
|
|
/** Offset within ICM of doorbell records */
|
|
size_t db_rec_offset;
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|
/** Doorbell records */
|
|
union arbelprm_doorbell_record *db_rec;
|
|
/** Event queue */
|
|
struct arbel_event_queue eq;
|
|
/** Unrestricted LKey
|
|
*
|
|
* Used to get unrestricted memory access.
|
|
*/
|
|
unsigned long lkey;
|
|
|
|
/** Completion queue in-use bitmask */
|
|
arbel_bitmask_t cq_inuse[ ARBEL_BITMASK_SIZE ( ARBEL_MAX_CQS ) ];
|
|
/** Queue pair in-use bitmask */
|
|
arbel_bitmask_t qp_inuse[ ARBEL_BITMASK_SIZE ( ARBEL_MAX_QPS ) ];
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|
|
|
/** Device limits */
|
|
struct arbel_dev_limits limits;
|
|
/** Special QPN base */
|
|
unsigned long special_qpn_base;
|
|
/** QPN base */
|
|
unsigned long qpn_base;
|
|
|
|
/** Infiniband devices */
|
|
struct ib_device *ibdev[ARBEL_NUM_PORTS];
|
|
};
|
|
|
|
/** Global protection domain */
|
|
#define ARBEL_GLOBAL_PD 0x123456
|
|
|
|
/** Memory key prefix */
|
|
#define ARBEL_MKEY_PREFIX 0x77000000UL
|
|
|
|
/*
|
|
* HCA commands
|
|
*
|
|
*/
|
|
|
|
#define ARBEL_HCR_BASE 0x80680
|
|
#define ARBEL_HCR_REG(x) ( ARBEL_HCR_BASE + 4 * (x) )
|
|
#define ARBEL_HCR_MAX_WAIT_MS 2000
|
|
#define ARBEL_MBOX_ALIGN 4096
|
|
#define ARBEL_MBOX_SIZE 512
|
|
|
|
/* HCA command is split into
|
|
*
|
|
* bits 11:0 Opcode
|
|
* bit 12 Input uses mailbox
|
|
* bit 13 Output uses mailbox
|
|
* bits 22:14 Input parameter length (in dwords)
|
|
* bits 31:23 Output parameter length (in dwords)
|
|
*
|
|
* Encoding the information in this way allows us to cut out several
|
|
* parameters to the arbel_command() call.
|
|
*/
|
|
#define ARBEL_HCR_IN_MBOX 0x00001000UL
|
|
#define ARBEL_HCR_OUT_MBOX 0x00002000UL
|
|
#define ARBEL_HCR_OPCODE( _command ) ( (_command) & 0xfff )
|
|
#define ARBEL_HCR_IN_LEN( _command ) ( ( (_command) >> 12 ) & 0x7fc )
|
|
#define ARBEL_HCR_OUT_LEN( _command ) ( ( (_command) >> 21 ) & 0x7fc )
|
|
|
|
/** Build HCR command from component parts */
|
|
#define ARBEL_HCR_INOUT_CMD( _opcode, _in_mbox, _in_len, \
|
|
_out_mbox, _out_len ) \
|
|
( (_opcode) | \
|
|
( (_in_mbox) ? ARBEL_HCR_IN_MBOX : 0 ) | \
|
|
( ( (_in_len) / 4 ) << 14 ) | \
|
|
( (_out_mbox) ? ARBEL_HCR_OUT_MBOX : 0 ) | \
|
|
( ( (_out_len) / 4 ) << 23 ) )
|
|
|
|
#define ARBEL_HCR_IN_CMD( _opcode, _in_mbox, _in_len ) \
|
|
ARBEL_HCR_INOUT_CMD ( _opcode, _in_mbox, _in_len, 0, 0 )
|
|
|
|
#define ARBEL_HCR_OUT_CMD( _opcode, _out_mbox, _out_len ) \
|
|
ARBEL_HCR_INOUT_CMD ( _opcode, 0, 0, _out_mbox, _out_len )
|
|
|
|
#define ARBEL_HCR_VOID_CMD( _opcode ) \
|
|
ARBEL_HCR_INOUT_CMD ( _opcode, 0, 0, 0, 0 )
|
|
|
|
/*
|
|
* Doorbell record allocation
|
|
*
|
|
* The doorbell record map looks like:
|
|
*
|
|
* ARBEL_MAX_CQS * Arm completion queue doorbell
|
|
* ARBEL_MAX_QPS * Send work request doorbell
|
|
* Group separator
|
|
* ...(empty space)...
|
|
* ARBEL_MAX_QPS * Receive work request doorbell
|
|
* ARBEL_MAX_CQS * Completion queue consumer counter update doorbell
|
|
*/
|
|
|
|
#define ARBEL_MAX_DOORBELL_RECORDS 512
|
|
#define ARBEL_GROUP_SEPARATOR_DOORBELL \
|
|
( ARBEL_MAX_CQS + ARBEL_RSVD_SPECIAL_QPS + ARBEL_MAX_QPS )
|
|
|
|
/**
|
|
* Get arm completion queue doorbell index
|
|
*
|
|
* @v arbel Arbel device
|
|
* @v cq Completion queue
|
|
* @ret doorbell_idx Doorbell index
|
|
*/
|
|
static inline unsigned int
|
|
arbel_cq_arm_doorbell_idx ( struct arbel *arbel,
|
|
struct ib_completion_queue *cq ) {
|
|
return ( cq->cqn - arbel->limits.reserved_cqs );
|
|
}
|
|
|
|
/**
|
|
* Get send work request doorbell index
|
|
*
|
|
* @v arbel Arbel device
|
|
* @v qp Queue pair
|
|
* @ret doorbell_idx Doorbell index
|
|
*/
|
|
static inline unsigned int
|
|
arbel_send_doorbell_idx ( struct arbel *arbel, struct ib_queue_pair *qp ) {
|
|
return ( ARBEL_MAX_CQS +
|
|
( ( qp->qpn & ~ARBEL_QPN_RANDOM_MASK ) -
|
|
arbel->special_qpn_base ) );
|
|
}
|
|
|
|
/**
|
|
* Get receive work request doorbell index
|
|
*
|
|
* @v arbel Arbel device
|
|
* @v qp Queue pair
|
|
* @ret doorbell_idx Doorbell index
|
|
*/
|
|
static inline unsigned int
|
|
arbel_recv_doorbell_idx ( struct arbel *arbel, struct ib_queue_pair *qp ) {
|
|
return ( ARBEL_MAX_DOORBELL_RECORDS - ARBEL_MAX_CQS -
|
|
( ( qp->qpn & ~ARBEL_QPN_RANDOM_MASK ) -
|
|
arbel->special_qpn_base ) - 1 );
|
|
}
|
|
|
|
/**
|
|
* Get completion queue consumer counter doorbell index
|
|
*
|
|
* @v arbel Arbel device
|
|
* @v cq Completion queue
|
|
* @ret doorbell_idx Doorbell index
|
|
*/
|
|
static inline unsigned int
|
|
arbel_cq_ci_doorbell_idx ( struct arbel *arbel,
|
|
struct ib_completion_queue *cq ) {
|
|
return ( ARBEL_MAX_DOORBELL_RECORDS -
|
|
( cq->cqn - arbel->limits.reserved_cqs ) - 1 );
|
|
}
|
|
|
|
#endif /* _ARBEL_H */
|