154 lines
3.8 KiB
C
154 lines
3.8 KiB
C
/*
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* Copyright (C) 2014 Michael Brown <mbrown@fensystems.co.uk>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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* You can also choose to distribute this program under the terms of
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* the Unmodified Binary Distribution Licence (as given in the file
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* COPYING.UBDL), provided that you have satisfied its requirements.
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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/** @file
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*
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* 16550-compatible UART
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*
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*/
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#include <unistd.h>
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#include <errno.h>
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#include <ipxe/uart.h>
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/** Timeout for transmit holding register to become empty */
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#define UART_THRE_TIMEOUT_MS 100
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/** Timeout for transmitter to become empty */
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#define UART_TEMT_TIMEOUT_MS 1000
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/**
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* Transmit data
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*
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* @v uart UART
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* @v data Data
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*/
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void uart_transmit ( struct uart *uart, uint8_t data ) {
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unsigned int i;
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uint8_t lsr;
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/* Wait for transmitter holding register to become empty */
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for ( i = 0 ; i < UART_THRE_TIMEOUT_MS ; i++ ) {
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lsr = uart_read ( uart, UART_LSR );
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if ( lsr & UART_LSR_THRE )
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break;
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mdelay ( 1 );
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}
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/* Transmit data (even if we timed out) */
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uart_write ( uart, UART_THR, data );
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}
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/**
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* Flush data
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*
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* @v uart UART
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*/
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void uart_flush ( struct uart *uart ) {
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unsigned int i;
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uint8_t lsr;
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/* Wait for transmitter and receiver to become empty */
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for ( i = 0 ; i < UART_TEMT_TIMEOUT_MS ; i++ ) {
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uart_read ( uart, UART_RBR );
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lsr = uart_read ( uart, UART_LSR );
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if ( ( lsr & UART_LSR_TEMT ) && ! ( lsr & UART_LSR_DR ) )
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break;
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}
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}
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/**
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* Check for existence of UART
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*
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* @v uart UART
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* @ret rc Return status code
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*/
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int uart_exists ( struct uart *uart ) {
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/* Fail if no UART port is defined */
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if ( ! uart->base )
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return -ENODEV;
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/* Fail if UART scratch register seems not to be present */
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uart_write ( uart, UART_SCR, 0x18 );
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if ( uart_read ( uart, UART_SCR ) != 0x18 )
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return -ENODEV;
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uart_write ( uart, UART_SCR, 0xae );
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if ( uart_read ( uart, UART_SCR ) != 0xae )
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return -ENODEV;
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return 0;
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}
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/**
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* Initialise UART
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*
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* @v uart UART
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* @v baud Baud rate, or zero to leave unchanged
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* @v lcr Line control register value, or zero to leave unchanged
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* @ret rc Return status code
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*/
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int uart_init ( struct uart *uart, unsigned int baud, uint8_t lcr ) {
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uint8_t dlm;
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uint8_t dll;
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int rc;
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/* Check for existence of UART */
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if ( ( rc = uart_exists ( uart ) ) != 0 )
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return rc;
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/* Configure divisor and line control register, if applicable */
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if ( ! lcr )
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lcr = uart_read ( uart, UART_LCR );
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uart->lcr = lcr;
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uart_write ( uart, UART_LCR, ( lcr | UART_LCR_DLAB ) );
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if ( baud ) {
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uart->divisor = ( UART_MAX_BAUD / baud );
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dlm = ( ( uart->divisor >> 8 ) & 0xff );
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dll = ( ( uart->divisor >> 0 ) & 0xff );
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uart_write ( uart, UART_DLM, dlm );
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uart_write ( uart, UART_DLL, dll );
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} else {
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dlm = uart_read ( uart, UART_DLM );
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dll = uart_read ( uart, UART_DLL );
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uart->divisor = ( ( dlm << 8 ) | dll );
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}
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uart_write ( uart, UART_LCR, ( lcr & ~UART_LCR_DLAB ) );
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/* Disable interrupts */
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uart_write ( uart, UART_IER, 0 );
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/* Enable FIFOs */
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uart_write ( uart, UART_FCR, UART_FCR_FE );
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/* Assert DTR and RTS */
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uart_write ( uart, UART_MCR, ( UART_MCR_DTR | UART_MCR_RTS ) );
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/* Flush any stale data */
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uart_flush ( uart );
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return 0;
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}
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