From f756fd78f7bbdb9476f88d8d92fbe47bde123636 Mon Sep 17 00:00:00 2001 From: Peter von Konigsmark Date: Wed, 6 Sep 2017 00:06:42 +0100 Subject: [PATCH] [exanic] Power up optical PHYs (if present) Modified-by: Michael Brown Signed-off-by: Michael Brown --- src/drivers/net/exanic.c | 3 +++ src/drivers/net/exanic.h | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/src/drivers/net/exanic.c b/src/drivers/net/exanic.c index 62296927..64a47b45 100644 --- a/src/drivers/net/exanic.c +++ b/src/drivers/net/exanic.c @@ -812,6 +812,9 @@ static int exanic_probe ( struct pci_device *pci ) { /* Read capabilities */ exanic->caps = readl ( exanic->regs + EXANIC_CAPS ); + /* Power up PHYs */ + writel ( EXANIC_POWER_ON, ( exanic->regs + EXANIC_POWER ) ); + /* Fetch base MAC address */ if ( ( rc = exanic_fetch_mac ( exanic ) ) != 0 ) goto err_fetch_mac; diff --git a/src/drivers/net/exanic.h b/src/drivers/net/exanic.h index fd9f5b8c..041b9e21 100644 --- a/src/drivers/net/exanic.h +++ b/src/drivers/net/exanic.h @@ -62,6 +62,10 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL ); /** I2C GPIO register */ #define EXANIC_I2C 0x012c +/** Power control register */ +#define EXANIC_POWER 0x0138 +#define EXANIC_POWER_ON 0x000000f0UL /**< Power on PHYs */ + /** Port register offset */ #define EXANIC_PORT_REGS( index ) ( 0x0200 + ( 0x40 * (index) ) )