[intel] Report receive overruns via network device errors
Signed-off-by: Michael Brown <mcb30@ipxe.org>
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@ -699,10 +699,14 @@ static void intel_poll ( struct net_device *netdev ) {
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if ( icr & INTEL_IRQ_TXDW )
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if ( icr & INTEL_IRQ_TXDW )
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intel_poll_tx ( netdev );
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intel_poll_tx ( netdev );
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/* Poll for RX completionsm, if applicable */
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/* Poll for RX completions, if applicable */
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if ( icr & INTEL_IRQ_RXT0 )
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if ( icr & INTEL_IRQ_RXT0 )
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intel_poll_rx ( netdev );
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intel_poll_rx ( netdev );
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/* Report receive overruns */
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if ( icr & INTEL_IRQ_RXO )
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netdev_rx_err ( netdev, NULL, -ENOBUFS );
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/* Check link state, if applicable */
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/* Check link state, if applicable */
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if ( icr & INTEL_IRQ_LSC )
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if ( icr & INTEL_IRQ_LSC )
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intel_check_link ( netdev );
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intel_check_link ( netdev );
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@ -93,6 +93,7 @@ enum intel_descriptor_status {
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#define INTEL_IRQ_TXDW 0x00000001UL /**< Transmit descriptor done */
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#define INTEL_IRQ_TXDW 0x00000001UL /**< Transmit descriptor done */
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#define INTEL_IRQ_LSC 0x00000004UL /**< Link status change */
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#define INTEL_IRQ_LSC 0x00000004UL /**< Link status change */
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#define INTEL_IRQ_RXT0 0x00000080UL /**< Receive timer */
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#define INTEL_IRQ_RXT0 0x00000080UL /**< Receive timer */
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#define INTEL_IRQ_RXO 0x00000400UL /**< Receive overrun */
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/** Interrupt Mask Set/Read Register */
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/** Interrupt Mask Set/Read Register */
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#define INTEL_IMS 0x000d0UL
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#define INTEL_IMS 0x000d0UL
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