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[e1000] Remove unused variable when ICR register is simply cleared

On reset and close, the ICR register is read to clear any pending
interrupts, but the value is simply ignored.  Avoid assigning the
value to a variable, to inhibit a warning from gcc 4.6.

Also fix a potential race condition in reset routines which clear
interrupts before disabling them.

Reported-by: Ralph Giles <giles@thaumas.net>
Tested-by: Ralph Giles <giles@thaumas.net>
Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown 2011-03-16 18:58:52 +00:00
parent d94e62ded4
commit c018d57803
12 changed files with 24 additions and 30 deletions

View File

@ -271,7 +271,7 @@ void e1000_init_function_pointers_82540(struct e1000_hw *hw)
**/
static s32 e1000_reset_hw_82540(struct e1000_hw *hw)
{
u32 ctrl, icr, manc;
u32 ctrl, manc;
s32 ret_val = E1000_SUCCESS;
DEBUGFUNC("e1000_reset_hw_82540");
@ -316,7 +316,7 @@ static s32 e1000_reset_hw_82540(struct e1000_hw *hw)
E1000_WRITE_REG(hw, E1000_MANC, manc);
E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
icr = E1000_READ_REG(hw, E1000_ICR);
E1000_READ_REG(hw, E1000_ICR);
return ret_val;
}

View File

@ -304,7 +304,7 @@ void e1000_init_function_pointers_82541(struct e1000_hw *hw)
**/
static s32 e1000_reset_hw_82541(struct e1000_hw *hw)
{
u32 ledctl, ctrl, icr, manc;
u32 ledctl, ctrl, manc;
DEBUGFUNC("e1000_reset_hw_82541");
@ -368,7 +368,7 @@ static s32 e1000_reset_hw_82541(struct e1000_hw *hw)
E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
/* Clear any pending interrupt events. */
icr = E1000_READ_REG(hw, E1000_ICR);
E1000_READ_REG(hw, E1000_ICR);
return E1000_SUCCESS;
}

View File

@ -186,7 +186,7 @@ static s32 e1000_reset_hw_82542(struct e1000_hw *hw)
{
struct e1000_bus_info *bus = &hw->bus;
s32 ret_val = E1000_SUCCESS;
u32 ctrl, icr;
u32 ctrl;
DEBUGFUNC("e1000_reset_hw_82542");
@ -217,7 +217,7 @@ static s32 e1000_reset_hw_82542(struct e1000_hw *hw)
msec_delay(2);
E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
icr = E1000_READ_REG(hw, E1000_ICR);
E1000_READ_REG(hw, E1000_ICR);
if (hw->revision_id == E1000_REVISION_2) {
if (bus->pci_cmd_word & CMD_MEM_WRT_INVALIDATE)

View File

@ -907,7 +907,7 @@ static s32 e1000_phy_hw_reset_82543(struct e1000_hw *hw)
**/
static s32 e1000_reset_hw_82543(struct e1000_hw *hw)
{
u32 ctrl, icr;
u32 ctrl;
s32 ret_val = E1000_SUCCESS;
DEBUGFUNC("e1000_reset_hw_82543");
@ -949,7 +949,7 @@ static s32 e1000_reset_hw_82543(struct e1000_hw *hw)
/* Masking off and clearing any pending interrupts */
E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
icr = E1000_READ_REG(hw, E1000_ICR);
E1000_READ_REG(hw, E1000_ICR);
return ret_val;
}

View File

@ -554,14 +554,12 @@ static void e1000_close ( struct net_device *netdev )
struct e1000_adapter *adapter = netdev_priv ( netdev );
struct e1000_hw *hw = &adapter->hw;
uint32_t rctl;
uint32_t icr;
DBG ( "e1000_close\n" );
/* Acknowledge interrupts */
icr = E1000_READ_REG ( hw, E1000_ICR );
/* Disable and acknowledge interrupts */
e1000_irq_disable ( adapter );
E1000_READ_REG ( hw, E1000_ICR );
/* disable receives */
rctl = E1000_READ_REG ( hw, E1000_RCTL );

View File

@ -841,7 +841,7 @@ static s32 e1000e_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
**/
static s32 e1000e_reset_hw_80003es2lan(struct e1000_hw *hw)
{
u32 ctrl, icr;
u32 ctrl;
s32 ret_val;
/*
@ -875,7 +875,7 @@ static s32 e1000e_reset_hw_80003es2lan(struct e1000_hw *hw)
/* Clear any pending interrupt events. */
ew32(IMC, 0xffffffff);
icr = er32(ICR);
er32(ICR);
ret_val = e1000e_check_alt_mac_addr_generic(hw);

View File

@ -919,7 +919,7 @@ out:
**/
static s32 e1000e_reset_hw_82571(struct e1000_hw *hw)
{
u32 ctrl, extcnf_ctrl, ctrl_ext, icr;
u32 ctrl, extcnf_ctrl, ctrl_ext;
s32 ret_val;
u16 i = 0;
@ -1004,7 +1004,7 @@ static s32 e1000e_reset_hw_82571(struct e1000_hw *hw)
/* Clear any pending interrupt events. */
ew32(IMC, 0xffffffff);
icr = er32(ICR);
er32(ICR);
/* Install any alternate MAC address into RAR0 */
ret_val = e1000e_check_alt_mac_addr_generic(hw);

View File

@ -2486,7 +2486,7 @@ static s32 e1000e_reset_hw_ich8lan(struct e1000_hw *hw)
{
struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
u16 reg;
u32 ctrl, icr, kab;
u32 ctrl, kab;
s32 ret_val;
/*
@ -2594,7 +2594,7 @@ static s32 e1000e_reset_hw_ich8lan(struct e1000_hw *hw)
ew32(CRC_OFFSET, 0x65656565);
ew32(IMC, 0xffffffff);
icr = er32(ICR);
er32(ICR);
kab = er32(KABGTXD);
kab |= E1000_KABGTXD_BGSQLBIAS;

View File

@ -873,14 +873,12 @@ static void e1000e_close ( struct net_device *netdev )
struct e1000_adapter *adapter = netdev_priv ( netdev );
struct e1000_hw *hw = &adapter->hw;
uint32_t rctl;
uint32_t icr;
DBGP ( "e1000_close\n" );
/* Acknowledge interrupts */
icr = E1000_READ_REG ( hw, E1000_ICR );
/* Disable and acknowledge interrupts */
e1000e_irq_disable ( adapter );
E1000_READ_REG ( hw, E1000_ICR );
/* disable receives */
rctl = E1000_READ_REG ( hw, E1000_RCTL );

View File

@ -959,7 +959,7 @@ void igb_shutdown_serdes_link_82575(struct e1000_hw *hw)
**/
static s32 igb_reset_hw_82575(struct e1000_hw *hw)
{
u32 ctrl, icr;
u32 ctrl;
s32 ret_val;
DEBUGFUNC("igb_reset_hw_82575");
@ -1009,7 +1009,7 @@ static s32 igb_reset_hw_82575(struct e1000_hw *hw)
/* Clear any pending interrupt events. */
E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
icr = E1000_READ_REG(hw, E1000_ICR);
E1000_READ_REG(hw, E1000_ICR);
/* Install any alternate MAC address into RAR0 */
ret_val = igb_check_alt_mac_addr_generic(hw);

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@ -639,14 +639,12 @@ static void igb_close ( struct net_device *netdev )
struct igb_adapter *adapter = netdev_priv ( netdev );
struct e1000_hw *hw = &adapter->hw;
uint32_t rctl;
uint32_t icr;
DBGP ( "igb_close\n" );
/* Acknowledge interrupts */
icr = E1000_READ_REG ( hw, E1000_ICR );
/* Disable and acknowledge interrupts */
igb_irq_disable ( adapter );
E1000_READ_REG ( hw, E1000_ICR );
/* disable receives */
rctl = E1000_READ_REG ( hw, E1000_RCTL );

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@ -666,12 +666,12 @@ static void igbvf_close ( struct net_device *netdev )
struct igbvf_adapter *adapter = netdev_priv ( netdev );
struct e1000_hw *hw = &adapter->hw;
uint32_t rxdctl;
uint32_t icr;
DBG ( "igbvf_close\n" );
icr = er32(EICR);
/* Disable and acknowledge interrupts */
igbvf_irq_disable ( adapter );
er32(EICR);
/* disable receives */
rxdctl = er32 ( RXDCTL(0) );