Add copyright, clean up comments a bit, remove unnecessary code.
Cleanups for e1000.c.
This commit is contained in:
Marty Connor
parent
1de705e30f
commit
82a3e80645
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@ -1,3 +1,18 @@
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/*
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* gPXE driver for Intel eepro1000 ethernet cards
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*
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* Written by Marty Connor
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*
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* Copyright Entity Cyber, Inc. 2007
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*
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* This software may be used and distributed according to the terms of
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* the GNU General Public License (GPL), incorporated herein by
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* reference. Drivers based on or derived from this code fall under
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* the GPL and must retain the authorship, copyright and license
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* notice.
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*
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*/
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/*******************************************************************************
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Intel PRO/1000 Linux driver
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@ -30,7 +45,8 @@
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/**
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* e1000_get_hw_control - get control of the h/w from f/w
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* @adapter: address of board private structure
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*
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* @v adapter e1000 private structure
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*
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* e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
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* For ASF and Pass Through versions of f/w this means that
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@ -39,7 +55,7 @@
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*
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**/
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static void
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e1000_get_hw_control(struct e1000_adapter *adapter)
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e1000_get_hw_control ( struct e1000_adapter *adapter )
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{
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uint32_t ctrl_ext;
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uint32_t swsm;
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@ -68,7 +84,8 @@ e1000_get_hw_control(struct e1000_adapter *adapter)
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/**
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* e1000_irq_enable - Enable default interrupt generation settings
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* @adapter: board private structure
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*
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* @v adapter e1000 private structure
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**/
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static void
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e1000_irq_enable ( struct e1000_adapter *adapter )
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@ -80,7 +97,8 @@ e1000_irq_enable ( struct e1000_adapter *adapter )
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/**
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* e1000_irq_disable - Mask off interrupt generation on the NIC
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* @adapter: board private structure
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*
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* @v adapter e1000 private structure
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**/
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static void
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e1000_irq_disable ( struct e1000_adapter *adapter )
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@ -91,7 +109,8 @@ e1000_irq_disable ( struct e1000_adapter *adapter )
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/**
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* e1000_irq_force - trigger interrupt
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* @adapter: board private structure
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*
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* @v adapter e1000 private structure
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**/
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static void
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e1000_irq_force ( struct e1000_adapter *adapter )
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@ -102,7 +121,8 @@ e1000_irq_force ( struct e1000_adapter *adapter )
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/**
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* e1000_sw_init - Initialize general software structures (struct e1000_adapter)
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* @adapter: board private structure to initialize
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*
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* @v adapter e1000 private structure
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*
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* e1000_sw_init initializes the Adapter private data structure.
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* Fields are initialized based on PCI device information and
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@ -178,10 +198,10 @@ e1000_sw_init ( struct e1000_adapter *adapter )
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/**
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* e1000_setup_tx_resources - allocate Tx resources (Descriptors)
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* @adapter: board private structure
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* @txdr: tx descriptor ring (for a specific queue) to setup
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*
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* Return 0 on success, negative on failure
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* @v adapter e1000 private structure
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*
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* @ret rc Returns 0 on success, negative on failure
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**/
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static int
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e1000_setup_tx_resources ( struct e1000_adapter *adapter )
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@ -232,11 +252,6 @@ e1000_configure_tx ( struct e1000_adapter *adapter )
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struct e1000_hw *hw = &adapter->hw;
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uint32_t tctl;
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#if 0
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uint32 tipg, tarc;
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uint32_t ipgr1, ipgr2;
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#endif
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DBG ( "e1000_configure_tx\n" );
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E1000_WRITE_REG ( hw, TDBAH, 0 );
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@ -253,100 +268,24 @@ e1000_configure_tx ( struct e1000_adapter *adapter )
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adapter->tx_head = 0;
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adapter->tx_tail = 0;
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adapter->tx_fill_ctr = 0;
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#if 0
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/* Set the default values for the Tx Inter Packet Gap timer */
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if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
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(hw->media_type == e1000_media_type_fiber ||
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hw->media_type == e1000_media_type_internal_serdes))
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tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
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else
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tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
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switch (hw->mac_type) {
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case e1000_82542_rev2_0:
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case e1000_82542_rev2_1:
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tipg = DEFAULT_82542_TIPG_IPGT;
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ipgr1 = DEFAULT_82542_TIPG_IPGR1;
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ipgr2 = DEFAULT_82542_TIPG_IPGR2;
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break;
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case e1000_80003es2lan:
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ipgr1 = DEFAULT_82543_TIPG_IPGR1;
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ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
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break;
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default:
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ipgr1 = DEFAULT_82543_TIPG_IPGR1;
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ipgr2 = DEFAULT_82543_TIPG_IPGR2;
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break;
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}
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tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
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tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
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E1000_WRITE_REG ( hw, TIPG, tipg );
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/* Set the Tx Interrupt Delay register */
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E1000_WRITE_REG (hw, TIDV, adapter->tx_int_delay);
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if (hw->mac_type >= e1000_82540)
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E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
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/* Program the Transmit Control Register */
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tctl = E1000_READ_REG ( hw, TCTL );
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tctl &= ~E1000_TCTL_CT;
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tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
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(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
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if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
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tarc = E1000_READ_REG(hw, TARC0);
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/* set the speed mode bit, we'll clear it if we're not at
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* gigabit link later */
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tarc |= (1 << 21);
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E1000_WRITE_REG(hw, TARC0, tarc);
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} else if (hw->mac_type == e1000_80003es2lan) {
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tarc = E1000_READ_REG(hw, TARC0);
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tarc |= 1;
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E1000_WRITE_REG(hw, TARC0, tarc);
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tarc = E1000_READ_REG(hw, TARC1);
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tarc |= 1;
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E1000_WRITE_REG(hw, TARC1, tarc);
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}
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#endif
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e1000_config_collision_dist ( hw );
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/* Setup Transmit Descriptor Settings for eop descriptor */
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tctl = E1000_TCTL_PSP | E1000_TCTL_EN |
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(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT) |
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(E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
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#if 0
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/* Setup Transmit Descriptor Settings for eop descriptor */
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adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
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/* only set IDE if we are delaying interrupts using the timers */
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if (adapter->tx_int_delay)
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adapter->txd_cmd |= E1000_TXD_CMD_IDE;
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if (hw->mac_type < e1000_82543)
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adapter->txd_cmd |= E1000_TXD_CMD_RPS;
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else
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adapter->txd_cmd |= E1000_TXD_CMD_RS;
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/* Cache if we're 82544 running in PCI-X because we'll
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* need this to apply a workaround later in the send path. */
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if (hw->mac_type == e1000_82544 &&
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hw->bus_type == e1000_bus_type_pcix)
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adapter->pcix_82544 = 1;
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#endif
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e1000_config_collision_dist ( hw );
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E1000_WRITE_REG ( hw, TCTL, tctl );
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E1000_WRITE_FLUSH ( hw );
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}
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/**
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* e1000_setup_rx_resources - allocate Rx resources (Descriptors)
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* @adapter: board private structure
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* @rxdr: rx descriptor ring (for a specific queue) to setup
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*
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* Returns 0 on success, negative on failure
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* @v adapter e1000 private structure
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*
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* @ret rc Returns 0 on success, negative on failure
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**/
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static int
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e1000_setup_rx_resources ( struct e1000_adapter *adapter )
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@ -600,7 +539,7 @@ e1000_close ( struct net_device *netdev )
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* @v netdev Network device
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* @v iobuf I/O buffer
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*
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* @ret rc Return status code
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* @ret rc Returns 0 on success, negative on failure
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*/
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static int
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e1000_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
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@ -649,14 +588,6 @@ e1000_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
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*/
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E1000_WRITE_REG ( hw, TDT, adapter->tx_tail );
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#if 0
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while ( ! ( tx_curr_desc->upper.data & E1000_TXD_STAT_DD ) ) {
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udelay ( 10 ); /* give the nic a chance to write to the register */
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}
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DBG ( "Leaving XMIT\n" );
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#endif
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return 0;
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}
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@ -682,9 +613,7 @@ e1000_poll ( struct net_device *netdev )
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uint32_t i;
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uint64_t tmp_buffer_addr;
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#if 0
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DBG ( "e1000_poll\n" );
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#endif
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DBGP ( "e1000_poll\n" );
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/* Acknowledge interrupts */
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icr = E1000_READ_REG ( hw, ICR );
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@ -702,11 +631,6 @@ e1000_poll ( struct net_device *netdev )
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tx_status = tx_curr_desc->upper.data;
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#if 0
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DBG ( "tx_curr_desc = %#08lx status = %#08lx\n",
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virt_to_bus ( tx_curr_desc ), tx_status );
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#endif
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/* if the packet at tx_head is not owned by hardware it is for us */
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if ( ! ( tx_status & E1000_TXD_STAT_DD ) )
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break;
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@ -743,7 +667,7 @@ e1000_poll ( struct net_device *netdev )
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( i * sizeof ( *adapter->rx_base ) );
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rx_status = rx_curr_desc->status;
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// DBG ( "Before DD Check RX_status: %#08lx\n", rx_status );
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DBG2 ( "Before DD Check RX_status: %#08lx\n", rx_status );
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if ( ! ( rx_status & E1000_RXD_STAT_DD ) )
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break;
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@ -1019,14 +943,14 @@ e1000_open ( struct net_device *netdev )
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/* allocate transmit descriptors */
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err = e1000_setup_tx_resources ( adapter );
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if (err) {
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if ( err ) {
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DBG ( "Error setting up TX resources!\n" );
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goto err_setup_tx;
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}
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/* allocate receive descriptors */
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err = e1000_setup_rx_resources ( adapter );
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if (err) {
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if ( err ) {
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DBG ( "Error setting up RX resources!\n" );
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goto err_setup_rx;
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}
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@ -1112,68 +1036,68 @@ e1000_io_write ( struct e1000_hw *hw __unused, unsigned long port, uint32_t val
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}
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static struct pci_device_id e1000_nics[] = {
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PCI_ROM(0x8086, 0x1000, "e1000-0x1000", "E1000-0x1000"),
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PCI_ROM(0x8086, 0x1001, "e1000-0x1001", "E1000-0x1001"),
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PCI_ROM(0x8086, 0x1004, "e1000-0x1004", "E1000-0x1004"),
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PCI_ROM(0x8086, 0x1008, "e1000-0x1008", "E1000-0x1008"),
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PCI_ROM(0x8086, 0x1009, "e1000-0x1009", "E1000-0x1009"),
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PCI_ROM(0x8086, 0x100C, "e1000-0x100C", "E1000-0x100C"),
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PCI_ROM(0x8086, 0x100D, "e1000-0x100D", "E1000-0x100D"),
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PCI_ROM(0x8086, 0x100E, "e1000-0x100E", "E1000-0x100E"),
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PCI_ROM(0x8086, 0x100F, "e1000-0x100F", "E1000-0x100F"),
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PCI_ROM(0x8086, 0x1010, "e1000-0x1010", "E1000-0x1010"),
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PCI_ROM(0x8086, 0x1011, "e1000-0x1011", "E1000-0x1011"),
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PCI_ROM(0x8086, 0x1012, "e1000-0x1012", "E1000-0x1012"),
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PCI_ROM(0x8086, 0x1013, "e1000-0x1013", "E1000-0x1013"),
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PCI_ROM(0x8086, 0x1014, "e1000-0x1014", "E1000-0x1014"),
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PCI_ROM(0x8086, 0x1015, "e1000-0x1015", "E1000-0x1015"),
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PCI_ROM(0x8086, 0x1016, "e1000-0x1016", "E1000-0x1016"),
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PCI_ROM(0x8086, 0x1017, "e1000-0x1017", "E1000-0x1017"),
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PCI_ROM(0x8086, 0x1018, "e1000-0x1018", "E1000-0x1018"),
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PCI_ROM(0x8086, 0x1019, "e1000-0x1019", "E1000-0x1019"),
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PCI_ROM(0x8086, 0x101A, "e1000-0x101A", "E1000-0x101A"),
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PCI_ROM(0x8086, 0x101D, "e1000-0x101D", "E1000-0x101D"),
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PCI_ROM(0x8086, 0x101E, "e1000-0x101E", "E1000-0x101E"),
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PCI_ROM(0x8086, 0x1026, "e1000-0x1026", "E1000-0x1026"),
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PCI_ROM(0x8086, 0x1027, "e1000-0x1027", "E1000-0x1027"),
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PCI_ROM(0x8086, 0x1028, "e1000-0x1028", "E1000-0x1028"),
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PCI_ROM(0x8086, 0x1049, "e1000-0x1049", "E1000-0x1049"),
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PCI_ROM(0x8086, 0x104A, "e1000-0x104A", "E1000-0x104A"),
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PCI_ROM(0x8086, 0x104B, "e1000-0x104B", "E1000-0x104B"),
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PCI_ROM(0x8086, 0x104C, "e1000-0x104C", "E1000-0x104C"),
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PCI_ROM(0x8086, 0x104D, "e1000-0x104D", "E1000-0x104D"),
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PCI_ROM(0x8086, 0x105E, "e1000-0x105E", "E1000-0x105E"),
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PCI_ROM(0x8086, 0x105F, "e1000-0x105F", "E1000-0x105F"),
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PCI_ROM(0x8086, 0x1060, "e1000-0x1060", "E1000-0x1060"),
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PCI_ROM(0x8086, 0x1075, "e1000-0x1075", "E1000-0x1075"),
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PCI_ROM(0x8086, 0x1076, "e1000-0x1076", "E1000-0x1076"),
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PCI_ROM(0x8086, 0x1077, "e1000-0x1077", "E1000-0x1077"),
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PCI_ROM(0x8086, 0x1078, "e1000-0x1078", "E1000-0x1078"),
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PCI_ROM(0x8086, 0x1079, "e1000-0x1079", "E1000-0x1079"),
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PCI_ROM(0x8086, 0x107A, "e1000-0x107A", "E1000-0x107A"),
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PCI_ROM(0x8086, 0x107B, "e1000-0x107B", "E1000-0x107B"),
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PCI_ROM(0x8086, 0x107C, "e1000-0x107C", "E1000-0x107C"),
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PCI_ROM(0x8086, 0x107D, "e1000-0x107D", "E1000-0x107D"),
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PCI_ROM(0x8086, 0x107E, "e1000-0x107E", "E1000-0x107E"),
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PCI_ROM(0x8086, 0x107F, "e1000-0x107F", "E1000-0x107F"),
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PCI_ROM(0x8086, 0x108A, "e1000-0x108A", "E1000-0x108A"),
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PCI_ROM(0x8086, 0x108B, "e1000-0x108B", "E1000-0x108B"),
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PCI_ROM(0x8086, 0x108C, "e1000-0x108C", "E1000-0x108C"),
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PCI_ROM(0x8086, 0x1096, "e1000-0x1096", "E1000-0x1096"),
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PCI_ROM(0x8086, 0x1098, "e1000-0x1098", "E1000-0x1098"),
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PCI_ROM(0x8086, 0x1099, "e1000-0x1099", "E1000-0x1099"),
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PCI_ROM(0x8086, 0x109A, "e1000-0x109A", "E1000-0x109A"),
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PCI_ROM(0x8086, 0x10A4, "e1000-0x10A4", "E1000-0x10A4"),
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PCI_ROM(0x8086, 0x10A5, "e1000-0x10A5", "E1000-0x10A5"),
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PCI_ROM(0x8086, 0x10B5, "e1000-0x10B5", "E1000-0x10B5"),
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PCI_ROM(0x8086, 0x10B9, "e1000-0x10B9", "E1000-0x10B9"),
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PCI_ROM(0x8086, 0x10BA, "e1000-0x10BA", "E1000-0x10BA"),
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PCI_ROM(0x8086, 0x10BB, "e1000-0x10BB", "E1000-0x10BB"),
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PCI_ROM(0x8086, 0x10BC, "e1000-0x10BC", "E1000-0x10BC"),
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PCI_ROM(0x8086, 0x10C4, "e1000-0x10C4", "E1000-0x10C4"),
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PCI_ROM(0x8086, 0x10C5, "e1000-0x10C5", "E1000-0x10C5"),
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PCI_ROM(0x8086, 0x10D9, "e1000-0x10D9", "E1000-0x10D9"),
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PCI_ROM(0x8086, 0x10DA, "e1000-0x10DA", "E1000-0x10DA"),
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PCI_ROM(0x8086, 0x1000, "e1000-0x1000", "e1000-0x1000"),
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PCI_ROM(0x8086, 0x1001, "e1000-0x1001", "e1000-0x1001"),
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PCI_ROM(0x8086, 0x1004, "e1000-0x1004", "e1000-0x1004"),
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PCI_ROM(0x8086, 0x1008, "e1000-0x1008", "e1000-0x1008"),
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PCI_ROM(0x8086, 0x1009, "e1000-0x1009", "e1000-0x1009"),
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PCI_ROM(0x8086, 0x100c, "e1000-0x100c", "e1000-0x100c"),
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PCI_ROM(0x8086, 0x100d, "e1000-0x100d", "e1000-0x100d"),
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PCI_ROM(0x8086, 0x100e, "e1000-0x100e", "e1000-0x100e"),
|
||||
PCI_ROM(0x8086, 0x100f, "e1000-0x100f", "e1000-0x100f"),
|
||||
PCI_ROM(0x8086, 0x1010, "e1000-0x1010", "e1000-0x1010"),
|
||||
PCI_ROM(0x8086, 0x1011, "e1000-0x1011", "e1000-0x1011"),
|
||||
PCI_ROM(0x8086, 0x1012, "e1000-0x1012", "e1000-0x1012"),
|
||||
PCI_ROM(0x8086, 0x1013, "e1000-0x1013", "e1000-0x1013"),
|
||||
PCI_ROM(0x8086, 0x1014, "e1000-0x1014", "e1000-0x1014"),
|
||||
PCI_ROM(0x8086, 0x1015, "e1000-0x1015", "e1000-0x1015"),
|
||||
PCI_ROM(0x8086, 0x1016, "e1000-0x1016", "e1000-0x1016"),
|
||||
PCI_ROM(0x8086, 0x1017, "e1000-0x1017", "e1000-0x1017"),
|
||||
PCI_ROM(0x8086, 0x1018, "e1000-0x1018", "e1000-0x1018"),
|
||||
PCI_ROM(0x8086, 0x1019, "e1000-0x1019", "e1000-0x1019"),
|
||||
PCI_ROM(0x8086, 0x101a, "e1000-0x101a", "e1000-0x101a"),
|
||||
PCI_ROM(0x8086, 0x101d, "e1000-0x101d", "e1000-0x101d"),
|
||||
PCI_ROM(0x8086, 0x101e, "e1000-0x101e", "e1000-0x101e"),
|
||||
PCI_ROM(0x8086, 0x1026, "e1000-0x1026", "e1000-0x1026"),
|
||||
PCI_ROM(0x8086, 0x1027, "e1000-0x1027", "e1000-0x1027"),
|
||||
PCI_ROM(0x8086, 0x1028, "e1000-0x1028", "e1000-0x1028"),
|
||||
PCI_ROM(0x8086, 0x1049, "e1000-0x1049", "e1000-0x1049"),
|
||||
PCI_ROM(0x8086, 0x104a, "e1000-0x104a", "e1000-0x104a"),
|
||||
PCI_ROM(0x8086, 0x104b, "e1000-0x104b", "e1000-0x104b"),
|
||||
PCI_ROM(0x8086, 0x104c, "e1000-0x104c", "e1000-0x104c"),
|
||||
PCI_ROM(0x8086, 0x104d, "e1000-0x104d", "e1000-0x104d"),
|
||||
PCI_ROM(0x8086, 0x105e, "e1000-0x105e", "e1000-0x105e"),
|
||||
PCI_ROM(0x8086, 0x105f, "e1000-0x105f", "e1000-0x105f"),
|
||||
PCI_ROM(0x8086, 0x1060, "e1000-0x1060", "e1000-0x1060"),
|
||||
PCI_ROM(0x8086, 0x1075, "e1000-0x1075", "e1000-0x1075"),
|
||||
PCI_ROM(0x8086, 0x1076, "e1000-0x1076", "e1000-0x1076"),
|
||||
PCI_ROM(0x8086, 0x1077, "e1000-0x1077", "e1000-0x1077"),
|
||||
PCI_ROM(0x8086, 0x1078, "e1000-0x1078", "e1000-0x1078"),
|
||||
PCI_ROM(0x8086, 0x1079, "e1000-0x1079", "e1000-0x1079"),
|
||||
PCI_ROM(0x8086, 0x107a, "e1000-0x107a", "e1000-0x107a"),
|
||||
PCI_ROM(0x8086, 0x107b, "e1000-0x107b", "e1000-0x107b"),
|
||||
PCI_ROM(0x8086, 0x107c, "e1000-0x107c", "e1000-0x107c"),
|
||||
PCI_ROM(0x8086, 0x107d, "e1000-0x107d", "e1000-0x107d"),
|
||||
PCI_ROM(0x8086, 0x107e, "e1000-0x107e", "e1000-0x107e"),
|
||||
PCI_ROM(0x8086, 0x107f, "e1000-0x107f", "e1000-0x107f"),
|
||||
PCI_ROM(0x8086, 0x108a, "e1000-0x108a", "e1000-0x108a"),
|
||||
PCI_ROM(0x8086, 0x108b, "e1000-0x108b", "e1000-0x108b"),
|
||||
PCI_ROM(0x8086, 0x108c, "e1000-0x108c", "e1000-0x108c"),
|
||||
PCI_ROM(0x8086, 0x1096, "e1000-0x1096", "e1000-0x1096"),
|
||||
PCI_ROM(0x8086, 0x1098, "e1000-0x1098", "e1000-0x1098"),
|
||||
PCI_ROM(0x8086, 0x1099, "e1000-0x1099", "e1000-0x1099"),
|
||||
PCI_ROM(0x8086, 0x109a, "e1000-0x109a", "e1000-0x109a"),
|
||||
PCI_ROM(0x8086, 0x10a4, "e1000-0x10a4", "e1000-0x10a4"),
|
||||
PCI_ROM(0x8086, 0x10a5, "e1000-0x10a5", "e1000-0x10a5"),
|
||||
PCI_ROM(0x8086, 0x10b5, "e1000-0x10b5", "e1000-0x10b5"),
|
||||
PCI_ROM(0x8086, 0x10b9, "e1000-0x10b9", "e1000-0x10b9"),
|
||||
PCI_ROM(0x8086, 0x10ba, "e1000-0x10ba", "e1000-0x10ba"),
|
||||
PCI_ROM(0x8086, 0x10bb, "e1000-0x10bb", "e1000-0x10bb"),
|
||||
PCI_ROM(0x8086, 0x10bc, "e1000-0x10bc", "e1000-0x10bc"),
|
||||
PCI_ROM(0x8086, 0x10c4, "e1000-0x10c4", "e1000-0x10c4"),
|
||||
PCI_ROM(0x8086, 0x10c5, "e1000-0x10c5", "e1000-0x10c5"),
|
||||
PCI_ROM(0x8086, 0x10d9, "e1000-0x10d9", "e1000-0x10d9"),
|
||||
PCI_ROM(0x8086, 0x10da, "e1000-0x10da", "e1000-0x10da"),
|
||||
};
|
||||
|
||||
struct pci_driver e1000_driver __pci_driver = {
|
||||
|
|
|
|||
Reference in New Issue