[3c90x] Clean up reset code
Remove duplicate hardware resets, remove network interface logic reset. This also fixes a bug where some 3c905C variants would return bogus EEPROM values because of a too short delay after the network reset. Signed-off-by: Thomas Miletich <thomas.miletich@gmail.com> Reported-by: Peter Huewe <peterhuewe@gmx.de> Tested-by: Peter Huewe <peterhuewe@gmx.de> Signed-off-by: Michael Brown <mcb30@ipxe.org>
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@ -206,7 +206,14 @@ static void a3c90x_reset(struct INF_3C90X *inf_3c90x)
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DBGP("a3c90x_reset\n");
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DBGP("a3c90x_reset\n");
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/* Send the reset command to the card */
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/* Send the reset command to the card */
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DBG2("3c90x: Issuing RESET\n");
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DBG2("3c90x: Issuing RESET\n");
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdGlobalReset, 0);
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/* reset of the receiver on B-revision cards re-negotiates the link
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* takes several seconds (a computer eternity), so we don't reset
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* it here.
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*/
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
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cmdGlobalReset,
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globalResetMaskNetwork);
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/* global reset command resets station mask, non-B revision cards
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/* global reset command resets station mask, non-B revision cards
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* require explicit reset of values
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* require explicit reset of values
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@ -216,26 +223,14 @@ static void a3c90x_reset(struct INF_3C90X *inf_3c90x)
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outw(0, inf_3c90x->IOAddr + regStationMask_2_3w + 2);
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outw(0, inf_3c90x->IOAddr + regStationMask_2_3w + 2);
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outw(0, inf_3c90x->IOAddr + regStationMask_2_3w + 4);
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outw(0, inf_3c90x->IOAddr + regStationMask_2_3w + 4);
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/* Issue transmit reset, wait for command completion */
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdTxReset, 0);
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdTxEnable, 0);
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdTxEnable, 0);
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/*
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* reset of the receiver on B-revision cards re-negotiates the link
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* takes several seconds (a computer eternity)
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*/
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdRxReset,
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inf_3c90x->isBrev ? 0x04 : 0x00);
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdRxEnable, 0);
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdRxEnable, 0);
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
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/* enable rxComplete and txComplete indications */
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cmdSetInterruptEnable, 0);
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/* enable rxComplete and txComplete */
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
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cmdSetIndicationEnable,
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cmdSetIndicationEnable,
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INT_TXCOMPLETE | INT_UPCOMPLETE);
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INT_TXCOMPLETE | INT_UPCOMPLETE);
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/* acknowledge any pending status flags */
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/* acknowledge any pending status flags */
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
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a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
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cmdAcknowledgeInterrupt, 0x661);
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cmdAcknowledgeInterrupt, 0x661);
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@ -193,6 +193,12 @@ enum Commands {
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cmdSetHashFilterBit = 0x19, /* */
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cmdSetHashFilterBit = 0x19, /* */
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};
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};
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enum GlobalResetParams {
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globalResetAll = 0,
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globalResetMaskNetwork = (1<<2),
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globalResetMaskAll = 0x1ff,
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};
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enum FrameStartHeader {
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enum FrameStartHeader {
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fshTxIndicate = 0x8000,
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fshTxIndicate = 0x8000,
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fshDnComplete = 0x10000,
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fshDnComplete = 0x10000,
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