Strip down i386 PCI configuration space I/O to the bare minimum. A
typical build will now include 880 bytes of PCI support code, compared to 2327 bytes in Etherboot 5.4. (There is a slight cost of around 5 extra bytes per access to a non-constant config space address; this should be an overall win. Driver-specific accesses will usually be to constant addresses, for which there is no additional cost.)
This commit is contained in:
parent
15ee09ed10
commit
6b6096d28b
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@ -1,451 +0,0 @@
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/*
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** Support for NE2000 PCI clones added David Monro June 1997
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** Generalised to other NICs by Ken Yap July 1997
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**
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** Most of this is taken from:
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**
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** /usr/src/linux/drivers/pci/pci.c
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** /usr/src/linux/include/linux/pci.h
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** /usr/src/linux/arch/i386/bios32.c
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** /usr/src/linux/include/linux/bios32.h
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** /usr/src/linux/drivers/net/ne.c
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*/
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#include "etherboot.h"
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#include <gpxe/init.h>
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#include <gpxe/pci.h>
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#include "pci_io.h"
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#ifdef KEEP_IT_REAL
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#include "realmode.h"
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#endif
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/* Macros for direct PCI access */
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#define CONFIG_ADDRESS 0xcf8
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#define CONFIG_DATA 0xcfc
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#define CONFIG_CMD( pci, where ) \
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( 0x80000000 | ( pci->bus << 16 ) | ( pci->devfn << 8 ) | \
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( where & ~3 ) )
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/* Signatures for PCI BIOS */
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#define BIOS_SIG(a,b,c,d) ( ( a<<0 ) + ( b<<8 ) + ( c<<16 ) + ( d<<24 ) )
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#define PRINT_BIOS_SIG(x) ( (x) & 0xff ), ( ( (x)>>8 ) & 0xff ), \
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( ( (x)>>16 ) & 0xff ),( ( (x)>>24 ) & 0xff )
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#define BIOS32_SIGNATURE BIOS_SIG ( '_', '3', '2', '_' )
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#define PCI_SIGNATURE BIOS_SIG ( 'P', 'C', 'I', ' ' )
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#define PCI_SERVICE BIOS_SIG ( '$', 'P', 'C', 'I' )
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/* BIOS32 structure as found in PCI BIOS ROM */
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struct bios32 {
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unsigned long signature; /* _32_ */
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unsigned long entry; /* 32 bit physical address */
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unsigned char revision; /* Revision level, 0 */
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unsigned char length; /* Length in paragraphs */
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unsigned char checksum; /* Should byte sum to zero */
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unsigned char reserved[5]; /* Must be zero */
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};
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/* Values returned by BIOS32 service directory */
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#define BIOS32_SERVICE_PRESENT 0x00
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#define BIOS32_SERVICE_NOT_PRESENT 0x80
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#define CF ( 1 << 0 )
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/* PCI BIOS entry point */
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#ifndef KEEP_IT_REAL
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static unsigned long pcibios32_entry;
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#endif
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static int have_pcibios;
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/* Macro for calling a 32-bit entry point with flat physical
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* addresses. Use in a statement such as
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* __asm__ ( FLAT_FAR_CALL_ESI,
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* : "=S" ( discard, or real output ), <other output registers>
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* : "S" ( entry_point ), <other input registers> );
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* "=S" *must* be specified as an output, otherwise the compiler will
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* assume that it remains unaltered.
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*/
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#define FLAT_FAR_CALL_ESI "call _virt_to_phys\n\t" \
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"pushl %%cs\n\t" \
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"call *%%esi\n\t" \
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"cli\n\t" \
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"cld\n\t" \
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"call _phys_to_virt\n\t"
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/*
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* Functions for accessing PCI configuration space directly with type
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* 1 accesses.
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*
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*/
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static inline int pcidirect_read_config_byte ( struct pci_device *pci,
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unsigned int where,
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uint8_t *value ) {
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outl ( CONFIG_CMD ( pci, where ), CONFIG_ADDRESS );
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*value = inb ( CONFIG_DATA + ( where & 3 ) );
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return 0;
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}
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static inline int pcidirect_read_config_word ( struct pci_device *pci,
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unsigned int where,
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uint16_t *value ) {
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outl ( CONFIG_CMD ( pci, where ), CONFIG_ADDRESS );
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*value = inw ( CONFIG_DATA + ( where & 2 ) );
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return 0;
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}
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static inline int pcidirect_read_config_dword ( struct pci_device *pci,
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unsigned int where,
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uint32_t *value ) {
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outl ( CONFIG_CMD ( pci, where ), CONFIG_ADDRESS );
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*value = inl ( CONFIG_DATA );
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return 0;
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}
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static inline int pcidirect_write_config_byte ( struct pci_device *pci,
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unsigned int where,
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uint8_t value ) {
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outl ( CONFIG_CMD ( pci, where ), CONFIG_ADDRESS );
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outb ( value, CONFIG_DATA + ( where & 3 ) );
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return 0;
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}
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static inline int pcidirect_write_config_word ( struct pci_device *pci,
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unsigned int where,
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uint16_t value ) {
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outl ( CONFIG_CMD ( pci, where ), CONFIG_ADDRESS );
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outw ( value, CONFIG_DATA + ( where & 2 ) );
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return 0;
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}
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static inline int pcidirect_write_config_dword ( struct pci_device *pci,
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unsigned int where,
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uint32_t value ) {
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outl ( CONFIG_CMD ( pci, where ), CONFIG_ADDRESS );
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outl ( value, CONFIG_DATA );
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return 0;
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}
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/*
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* Functions for accessing PCI configuration space directly via the
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* PCI BIOS.
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*
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* Under -DKEEP_IT_REAL, we use INT 1A, otherwise we use the BIOS32
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* interface.
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*/
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#ifdef KEEP_IT_REAL
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static void find_pcibios16 ( void ) {
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uint16_t present;
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uint32_t signature;
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uint16_t flags;
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uint16_t revision;
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uint8_t max_bus;
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/* PCI BIOS installation check */
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REAL_EXEC ( rm_pcibios_check,
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"int $0x1a\n\t"
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"pushfw\n\t"
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"popw %%si\n\t",
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5,
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OUT_CONSTRAINTS ( "=a" ( present ), "=b" ( revision ),
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"=c" ( max_bus ), "=d" ( signature ),
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"=S" ( flags ) ),
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IN_CONSTRAINTS ( "a" ( ( PCIBIOS_PCI_FUNCTION_ID << 8 ) +
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PCIBIOS_PCI_BIOS_PRESENT ) ),
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CLOBBER ( "edi", "ebp" ) );
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if ( ( flags & CF ) ||
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( ( present >> 8 ) != 0 ) ||
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( signature != PCI_SIGNATURE ) ) {
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DBG ( "PCI BIOS installation check failed\n" );
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return;
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}
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/* We have a PCI BIOS */
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DBG ( "Found 16-bit PCI BIOS interface with %d buses\n", max_bus + 1 );
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have_pcibios = 1;
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pci_max_bus = max_bus;
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return;
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}
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INIT_FN ( INIT_PCIBIOS, find_pcibios16, NULL, NULL );
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#define pcibios16_read_write( command, pci, where, value ) \
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( { \
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uint32_t discard_b, discard_D; \
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uint16_t ret; \
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\
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REAL_EXEC ( 999, /* need a local label */ \
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"int $0x1a\n\t" \
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"jc 1f\n\t" \
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"xorw %%ax, %%ax\n\t" \
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"\n1:\n\t", \
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5, \
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OUT_CONSTRAINTS ( "=a" ( ret ), \
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"=b" ( discard_b ), \
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"=c" ( value ), \
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"=D" ( discard_D ) ), \
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IN_CONSTRAINTS ( "a" ( command + \
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( PCIBIOS_PCI_FUNCTION_ID << 8 ) ), \
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"b" ( pci->busdevfn ), \
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"c" ( value ), \
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"D" ( where ) ), \
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CLOBBER ( "edx", "esi", "ebp" ) ); \
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\
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( ret >> 8 ); \
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} )
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#define pcibios_read_write pcibios16_read_write
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#else /* KEEP_IT_REAL */
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/*
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* Locate the BIOS32 service directory by scanning for a valid BIOS32
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* structure
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*
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*/
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static struct bios32 * find_bios32 ( void ) {
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uint32_t address;
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/*
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* Follow the standard procedure for locating the BIOS32 Service
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* directory by scanning the permissible address range from
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* 0xe0000 through 0xfffff for a valid BIOS32 structure.
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*
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*/
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for ( address = 0xe0000 ; address < 0xffff0 ; address += 16 ) {
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struct bios32 * candidate = phys_to_virt ( address );
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unsigned int length, i;
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unsigned char sum;
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if ( candidate->signature != BIOS32_SIGNATURE )
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continue;
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length = candidate->length * 16;
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if ( ! length )
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continue;
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for ( sum = 0, i = 0 ; i < length ; i++ )
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sum += ( ( char * ) candidate ) [i];
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if ( sum != 0 )
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continue;
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if ( candidate->revision != 0 ) {
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DBG ( "unsupported BIOS32 revision %d at %#x\n",
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candidate->revision, address );
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continue;
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}
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DBG ( "BIOS32 Service Directory structure at %#x\n", address );
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return candidate;
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}
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return NULL;
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}
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/*
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* Look up a service in the BIOS32 service directory
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*
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*/
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static unsigned long find_bios32_service ( struct bios32 * bios32,
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unsigned long service ) {
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uint8_t return_code;
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uint32_t address;
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uint32_t length;
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uint32_t entry;
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uint32_t discard;
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__asm__ ( FLAT_FAR_CALL_ESI
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: "=a" ( return_code ), "=b" ( address ),
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"=c" ( length ), "=d" ( entry ), "=S" ( discard )
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: "a" ( service ), "b" ( 0 ), "S" ( bios32->entry )
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: "edi", "ebp" );
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switch ( return_code ) {
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case BIOS32_SERVICE_PRESENT:
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DBG ( "BIOS32 service %c%c%c%c present at %#x\n",
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PRINT_BIOS_SIG ( service ), ( address + entry ) );
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return ( address + entry );
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case BIOS32_SERVICE_NOT_PRESENT:
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DBG ( "BIOS32 service %c%c%c%c : not present\n",
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PRINT_BIOS_SIG ( service ) );
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return 0;
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default: /* Shouldn't happen */
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DBG ( "BIOS32 returned %#x for service %c%c%c%c!\n",
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return_code, PRINT_BIOS_SIG ( service ) );
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return 0;
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}
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}
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/*
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* Find the 32-bit PCI BIOS interface, if present.
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*
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*/
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static void find_pcibios32 ( void ) {
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struct bios32 *bios32;
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uint32_t signature;
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uint16_t present;
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uint32_t flags;
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uint16_t revision;
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uint8_t max_bus;
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/* Locate BIOS32 service directory */
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bios32 = find_bios32 ();
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if ( ! bios32 ) {
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DBG ( "No BIOS32\n" );
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return;
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}
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/* Locate PCI BIOS service */
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pcibios32_entry = find_bios32_service ( bios32, PCI_SERVICE );
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if ( ! pcibios32_entry ) {
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DBG ( "No PCI BIOS\n" );
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return;
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}
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/* PCI BIOS installation check */
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__asm__ ( FLAT_FAR_CALL_ESI
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"pushfl\n\t"
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"popl %%esi\n\t"
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: "=a" ( present ), "=b" ( revision ), "=c" ( max_bus ),
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"=d" ( signature ), "=S" ( flags )
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: "a" ( ( PCIBIOS_PCI_FUNCTION_ID << 8 )
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+ PCIBIOS_PCI_BIOS_PRESENT ),
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"S" ( pcibios32_entry )
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: "edi", "ebp" );
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if ( ( flags & CF ) ||
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( ( present >> 8 ) != 0 ) ||
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( signature != PCI_SIGNATURE ) ) {
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DBG ( "PCI BIOS installation check failed\n" );
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return;
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}
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/* We have a PCI BIOS */
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DBG ( "Found 32-bit PCI BIOS interface at %#x with %d bus(es)\n",
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pcibios32_entry, max_bus + 1 );
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have_pcibios = 1;
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pci_max_bus = max_bus;
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return;
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}
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INIT_FN ( INIT_PCIBIOS, find_pcibios32, NULL, NULL );
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#define pcibios32_read_write( command, pci, where, value ) \
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( { \
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uint32_t discard_b, discard_D, discard_S; \
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uint16_t ret; \
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\
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__asm__ ( FLAT_FAR_CALL_ESI \
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"jc 1f\n\t" \
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"xorl %%eax, %%eax\n\t" \
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"\n1:\n\t" \
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: "=a" ( ret ), "=b" ( discard_b ), \
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"=c" ( value ), \
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"=S" ( discard_S ), "=D" ( discard_D ) \
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: "a" ( ( PCIBIOS_PCI_FUNCTION_ID << 8 ) \
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+ command ), \
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"b" ( ( pci->bus << 8 ) | pci->devfn ), \
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"c" ( value ), "D" ( where ), \
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"S" ( pcibios32_entry ) \
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: "edx", "ebp" ); \
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\
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( ret >> 8 ); \
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} )
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#define pcibios_read_write pcibios32_read_write
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#endif /* KEEP_IT_REAL */
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static inline int pcibios_read_config_byte ( struct pci_device *pci,
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unsigned int where,
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uint8_t *value ) {
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return pcibios_read_write ( PCIBIOS_READ_CONFIG_BYTE,
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pci, where, *value );
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}
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static inline int pcibios_read_config_word ( struct pci_device *pci,
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unsigned int where,
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uint16_t *value ) {
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return pcibios_read_write ( PCIBIOS_READ_CONFIG_WORD,
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pci, where, *value );
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}
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static inline int pcibios_read_config_dword ( struct pci_device *pci,
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unsigned int where,
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uint32_t *value ) {
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return pcibios_read_write ( PCIBIOS_READ_CONFIG_DWORD,
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|
||||||
pci, where, *value );
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline int pcibios_write_config_byte ( struct pci_device *pci,
|
|
||||||
unsigned int where,
|
|
||||||
uint8_t value ) {
|
|
||||||
return pcibios_read_write ( PCIBIOS_WRITE_CONFIG_BYTE,
|
|
||||||
pci, where, value );
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline int pcibios_write_config_word ( struct pci_device *pci,
|
|
||||||
unsigned int where,
|
|
||||||
uint16_t value ) {
|
|
||||||
return pcibios_read_write ( PCIBIOS_WRITE_CONFIG_WORD,
|
|
||||||
pci, where, value );
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline int pcibios_write_config_dword ( struct pci_device *pci,
|
|
||||||
unsigned int where,
|
|
||||||
uint32_t value ) {
|
|
||||||
return pcibios_read_write ( PCIBIOS_WRITE_CONFIG_DWORD,
|
|
||||||
pci, where, value );
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Functions for accessing PCI configuration space via the PCI BIOS if
|
|
||||||
* present, otherwise directly via type 1 accesses.
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
int pci_read_config_byte ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint8_t *value ) {
|
|
||||||
return have_pcibios ?
|
|
||||||
pcibios_read_config_byte ( pci, where, value ) :
|
|
||||||
pcidirect_read_config_byte ( pci, where, value );
|
|
||||||
}
|
|
||||||
|
|
||||||
int pci_read_config_word ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint16_t *value ) {
|
|
||||||
return have_pcibios ?
|
|
||||||
pcibios_read_config_word ( pci, where, value ) :
|
|
||||||
pcidirect_read_config_word ( pci, where, value );
|
|
||||||
}
|
|
||||||
|
|
||||||
int pci_read_config_dword ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint32_t *value ) {
|
|
||||||
return have_pcibios ?
|
|
||||||
pcibios_read_config_dword ( pci, where, value ) :
|
|
||||||
pcidirect_read_config_dword ( pci, where, value );
|
|
||||||
}
|
|
||||||
|
|
||||||
int pci_write_config_byte ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint8_t value ) {
|
|
||||||
return have_pcibios ?
|
|
||||||
pcibios_write_config_byte ( pci, where, value ) :
|
|
||||||
pcidirect_write_config_byte ( pci, where, value );
|
|
||||||
}
|
|
||||||
|
|
||||||
int pci_write_config_word ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint16_t value ) {
|
|
||||||
return have_pcibios ?
|
|
||||||
pcibios_write_config_word ( pci, where, value ) :
|
|
||||||
pcidirect_write_config_word ( pci, where, value );
|
|
||||||
}
|
|
||||||
|
|
||||||
int pci_write_config_dword ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint32_t value ) {
|
|
||||||
return have_pcibios ?
|
|
||||||
pcibios_write_config_dword ( pci, where, value ) :
|
|
||||||
pcidirect_write_config_dword ( pci, where, value );
|
|
||||||
}
|
|
||||||
|
|
||||||
unsigned long pci_bus_base ( struct pci_device *pci __unused ) {
|
|
||||||
/* architecturally this must be 0 */
|
|
||||||
return 0;
|
|
||||||
}
|
|
|
@ -0,0 +1,111 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of the
|
||||||
|
* License, or any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
|
||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||||
|
* General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <gpxe/pci.h>
|
||||||
|
#include <pcibios.h>
|
||||||
|
#include <realmode.h>
|
||||||
|
|
||||||
|
/** @file
|
||||||
|
*
|
||||||
|
* PCI configuration space access via PCI BIOS
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Determine maximum PCI bus number within system
|
||||||
|
*
|
||||||
|
* @ret max_bus Maximum bus number
|
||||||
|
*/
|
||||||
|
int pcibios_max_bus ( void ) {
|
||||||
|
int discard_a;
|
||||||
|
uint8_t max_bus;
|
||||||
|
|
||||||
|
REAL_EXEC ( rm_pcibios_check,
|
||||||
|
"stc\n\t"
|
||||||
|
"int $0x1a\n\t"
|
||||||
|
"jnc 1f\n\t"
|
||||||
|
"xorw %%cx, %%cx\n\t"
|
||||||
|
"\n1:\n\t",
|
||||||
|
2,
|
||||||
|
OUT_CONSTRAINTS ( "=a" ( discard_a ), "=c" ( max_bus ) ),
|
||||||
|
IN_CONSTRAINTS ( "a" ( PCIBIOS_INSTALLATION_CHECK >> 16 )),
|
||||||
|
CLOBBER ( "ebx", "edx", "edi" ) );
|
||||||
|
|
||||||
|
return max_bus;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Read configuration space via PCI BIOS
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v command PCI BIOS command
|
||||||
|
* @v value Value read
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
int pcibios_read ( struct pci_device *pci, uint32_t command, uint32_t *value ){
|
||||||
|
int discard_b, discard_D;
|
||||||
|
int status;
|
||||||
|
|
||||||
|
REAL_EXEC ( rm_pcibios_read,
|
||||||
|
"stc\n\t"
|
||||||
|
"int $0x1a\n\t"
|
||||||
|
"jnc 1f\n\t"
|
||||||
|
"xorl %%eax, %%eax\n\t"
|
||||||
|
"decl %%eax\n\t"
|
||||||
|
"movl %%eax, %%ecx\n\t"
|
||||||
|
"\n1:\n\t",
|
||||||
|
4,
|
||||||
|
OUT_CONSTRAINTS ( "=a" ( status ), "=b" ( discard_b ),
|
||||||
|
"=c" ( *value ), "=D" ( discard_D ) ),
|
||||||
|
IN_CONSTRAINTS ( "a" ( command >> 16 ),
|
||||||
|
"b" ( ( pci->bus << 8 ) | pci->devfn ),
|
||||||
|
"D" ( command ) ),
|
||||||
|
CLOBBER ( "edx" ) );
|
||||||
|
|
||||||
|
return ( ( status >> 8 ) & 0xff );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Write configuration space via PCI BIOS
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v command PCI BIOS command
|
||||||
|
* @v value Value to be written
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
int pcibios_write ( struct pci_device *pci, uint32_t command, uint32_t value ){
|
||||||
|
int discard_b, discard_c, discard_D;
|
||||||
|
int status;
|
||||||
|
|
||||||
|
REAL_EXEC ( rm_pcibios_write,
|
||||||
|
"stc\n\t"
|
||||||
|
"int $0x1a\n\t"
|
||||||
|
"jnc 1f\n\t"
|
||||||
|
"movb $0xff, %%ah\n\t"
|
||||||
|
"\n1:\n\t",
|
||||||
|
4,
|
||||||
|
OUT_CONSTRAINTS ( "=a" ( status ), "=b" ( discard_b ),
|
||||||
|
"=c" ( discard_c ), "=D" ( discard_D ) ),
|
||||||
|
IN_CONSTRAINTS ( "a" ( command >> 16 ),
|
||||||
|
"b" ( ( pci->bus << 8 ) | pci->devfn ),
|
||||||
|
"c" ( value ), "D" ( command ) ),
|
||||||
|
CLOBBER ( "edx" ) );
|
||||||
|
|
||||||
|
return ( ( status >> 8 ) & 0xff );
|
||||||
|
}
|
|
@ -0,0 +1,38 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of the
|
||||||
|
* License, or any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
|
||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||||
|
* General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <gpxe/pci.h>
|
||||||
|
#include <pcidirect.h>
|
||||||
|
|
||||||
|
/** @file
|
||||||
|
*
|
||||||
|
* PCI configuration space access via Type 1 accesses
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Prepare for Type 1 PCI configuration space access
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
*/
|
||||||
|
void pcidirect_prepare ( struct pci_device *pci, int where ) {
|
||||||
|
outl ( ( 0x80000000 | ( pci->bus << 16 ) | ( pci->devfn << 8 ) |
|
||||||
|
( where & ~3 ) ), PCIDIRECT_CONFIG_ADDRESS );
|
||||||
|
}
|
||||||
|
|
|
@ -1,20 +1,35 @@
|
||||||
#ifndef PCI_IO_H
|
#ifndef _PCI_IO_H
|
||||||
#define PCI_IO_H
|
#define _PCI_IO_H
|
||||||
|
|
||||||
/* %ah */
|
#include <pcibios.h>
|
||||||
#define PCIBIOS_PCI_FUNCTION_ID ( 0xb1 )
|
#include <pcidirect.h>
|
||||||
/* %al */
|
|
||||||
#define PCIBIOS_PCI_BIOS_PRESENT ( 0x01 )
|
|
||||||
#define PCIBIOS_FIND_PCI_DEVICE ( 0x02 )
|
|
||||||
#define PCIBIOS_FIND_PCI_CLASS_CODE ( 0x03 )
|
|
||||||
#define PCIBIOS_GENERATE_SPECIAL_CYCLE ( 0x06 )
|
|
||||||
#define PCIBIOS_READ_CONFIG_BYTE ( 0x08 )
|
|
||||||
#define PCIBIOS_READ_CONFIG_WORD ( 0x09 )
|
|
||||||
#define PCIBIOS_READ_CONFIG_DWORD ( 0x0a )
|
|
||||||
#define PCIBIOS_WRITE_CONFIG_BYTE ( 0x0b )
|
|
||||||
#define PCIBIOS_WRITE_CONFIG_WORD ( 0x0c )
|
|
||||||
#define PCIBIOS_WRITE_CONFIG_DWORD ( 0x0d )
|
|
||||||
#define PCIBIOS_GET_IRQ_ROUTING_OPTIONS ( 0x0e )
|
|
||||||
#define PCIBIOS_SET_PCI_IRQ ( 0x0f )
|
|
||||||
|
|
||||||
#endif /* PCI_IO_H */
|
/** @file
|
||||||
|
*
|
||||||
|
* i386 PCI configuration space access
|
||||||
|
*
|
||||||
|
* We have two methods of PCI configuration space access: the PCI BIOS
|
||||||
|
* and direct Type 1 accesses. Selecting between them is via the
|
||||||
|
* compile-time switch -DCONFIG_PCI_DIRECT.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if CONFIG_PCI_DIRECT
|
||||||
|
#define pci_max_bus pcidirect_max_bus
|
||||||
|
#define pci_read_config_byte pcidirect_read_config_byte
|
||||||
|
#define pci_read_config_word pcidirect_read_config_word
|
||||||
|
#define pci_read_config_dword pcidirect_read_config_dword
|
||||||
|
#define pci_write_config_byte pcidirect_write_config_byte
|
||||||
|
#define pci_write_config_word pcidirect_write_config_word
|
||||||
|
#define pci_write_config_dword pcidirect_write_config_dword
|
||||||
|
#else /* CONFIG_PCI_DIRECT */
|
||||||
|
#define pci_max_bus pcibios_max_bus
|
||||||
|
#define pci_read_config_byte pcibios_read_config_byte
|
||||||
|
#define pci_read_config_word pcibios_read_config_word
|
||||||
|
#define pci_read_config_dword pcibios_read_config_dword
|
||||||
|
#define pci_write_config_byte pcibios_write_config_byte
|
||||||
|
#define pci_write_config_word pcibios_write_config_word
|
||||||
|
#define pci_write_config_dword pcibios_write_config_dword
|
||||||
|
#endif /* CONFIG_PCI_DIRECT */
|
||||||
|
|
||||||
|
#endif /* _PCI_IO_H */
|
||||||
|
|
|
@ -0,0 +1,122 @@
|
||||||
|
#ifndef _PCIBIOS_H
|
||||||
|
#define _PCIBIOS_H
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
/** @file
|
||||||
|
*
|
||||||
|
* PCI configuration space access via PCI BIOS
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
struct pci_device;
|
||||||
|
|
||||||
|
#define PCIBIOS_INSTALLATION_CHECK 0xb1010000
|
||||||
|
#define PCIBIOS_READ_CONFIG_BYTE 0xb1080000
|
||||||
|
#define PCIBIOS_READ_CONFIG_WORD 0xb1090000
|
||||||
|
#define PCIBIOS_READ_CONFIG_DWORD 0xb10a0000
|
||||||
|
#define PCIBIOS_WRITE_CONFIG_BYTE 0xb10b0000
|
||||||
|
#define PCIBIOS_WRITE_CONFIG_WORD 0xb10c0000
|
||||||
|
#define PCIBIOS_WRITE_CONFIG_DWORD 0xb10d0000
|
||||||
|
|
||||||
|
extern int pcibios_max_bus ( void );
|
||||||
|
extern int pcibios_read ( struct pci_device *pci, uint32_t command,
|
||||||
|
uint32_t *value );
|
||||||
|
extern int pcibios_write ( struct pci_device *pci, uint32_t command,
|
||||||
|
uint32_t value );
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Read byte from PCI configuration space via PCI BIOS
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value read
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcibios_read_config_byte ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint8_t *value ) {
|
||||||
|
uint32_t tmp;
|
||||||
|
int rc;
|
||||||
|
|
||||||
|
rc = pcibios_read ( pci, PCIBIOS_READ_CONFIG_BYTE | where, &tmp );
|
||||||
|
*value = tmp;
|
||||||
|
return rc;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Read word from PCI configuration space via PCI BIOS
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value read
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcibios_read_config_word ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint16_t *value ) {
|
||||||
|
uint32_t tmp;
|
||||||
|
int rc;
|
||||||
|
|
||||||
|
rc = pcibios_read ( pci, PCIBIOS_READ_CONFIG_WORD | where, &tmp );
|
||||||
|
*value = tmp;
|
||||||
|
return rc;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Read dword from PCI configuration space via PCI BIOS
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value read
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcibios_read_config_dword ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint32_t *value ) {
|
||||||
|
return pcibios_read ( pci, PCIBIOS_READ_CONFIG_DWORD | where, value );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Write byte to PCI configuration space via PCI BIOS
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value to be written
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcibios_write_config_byte ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint8_t value ) {
|
||||||
|
return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_BYTE | where, value );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Write word to PCI configuration space via PCI BIOS
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value to be written
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcibios_write_config_word ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint16_t value ) {
|
||||||
|
return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_BYTE | where, value );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Write dword to PCI configuration space via PCI BIOS
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value to be written
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcibios_write_config_dword ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint32_t value ) {
|
||||||
|
return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_BYTE | where, value );
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _PCIBIOS_H */
|
|
@ -0,0 +1,126 @@
|
||||||
|
#ifndef _PCIDIRECT_H
|
||||||
|
#define _PCIDIRECT_H
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <io.h>
|
||||||
|
|
||||||
|
/** @file
|
||||||
|
*
|
||||||
|
* PCI configuration space access via Type 1 accesses
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PCIDIRECT_CONFIG_ADDRESS 0xcf8
|
||||||
|
#define PCIDIRECT_CONFIG_DATA 0xcfc
|
||||||
|
|
||||||
|
struct pci_device;
|
||||||
|
|
||||||
|
extern void pcidirect_prepare ( struct pci_device *pci, int where );
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Determine maximum PCI bus number within system
|
||||||
|
*
|
||||||
|
* @ret max_bus Maximum bus number
|
||||||
|
*/
|
||||||
|
static inline int pcidirect_max_bus ( void ) {
|
||||||
|
/* No way to work this out via Type 1 accesses */
|
||||||
|
return 0xff;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Read byte from PCI configuration space via Type 1 access
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value read
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcidirect_read_config_byte ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint8_t *value ) {
|
||||||
|
pcidirect_prepare ( pci, where );
|
||||||
|
*value = inb ( PCIDIRECT_CONFIG_DATA + ( where & 3 ) );
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Read word from PCI configuration space via Type 1 access
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value read
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcidirect_read_config_word ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint16_t *value ) {
|
||||||
|
pcidirect_prepare ( pci, where );
|
||||||
|
*value = inw ( PCIDIRECT_CONFIG_DATA + ( where & 2 ) );
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Read dword from PCI configuration space via Type 1 access
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value read
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcidirect_read_config_dword ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint32_t *value ) {
|
||||||
|
pcidirect_prepare ( pci, where );
|
||||||
|
*value = inl ( PCIDIRECT_CONFIG_DATA + where );
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Write byte to PCI configuration space via Type 1 access
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value to be written
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcidirect_write_config_byte ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint8_t value ) {
|
||||||
|
pcidirect_prepare ( pci, where );
|
||||||
|
outb ( value, PCIDIRECT_CONFIG_DATA + ( where & 3 ) );
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Write word to PCI configuration space via Type 1 access
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value to be written
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcidirect_write_config_word ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint16_t value ) {
|
||||||
|
pcidirect_prepare ( pci, where );
|
||||||
|
outb ( value, PCIDIRECT_CONFIG_DATA + ( where & 2 ) );
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Write dword to PCI configuration space via Type 1 access
|
||||||
|
*
|
||||||
|
* @v pci PCI device
|
||||||
|
* @v where Location within PCI configuration space
|
||||||
|
* @v value Value to be written
|
||||||
|
* @ret rc Return status code
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) int
|
||||||
|
pcidirect_write_config_dword ( struct pci_device *pci, unsigned int where,
|
||||||
|
uint32_t value ) {
|
||||||
|
pcidirect_prepare ( pci, where );
|
||||||
|
outb ( value, PCIDIRECT_CONFIG_DATA + where );
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _PCIDIRECT_H */
|
|
@ -38,15 +38,6 @@ static struct pci_driver pci_drivers_end[0] __table_end ( pci_drivers );
|
||||||
|
|
||||||
static void pcibus_remove ( struct root_device *rootdev );
|
static void pcibus_remove ( struct root_device *rootdev );
|
||||||
|
|
||||||
/**
|
|
||||||
* Maximum PCI bus number
|
|
||||||
*
|
|
||||||
* Architecture-specific code may know how many buses we have, in
|
|
||||||
* which case it can overwrite this value.
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
unsigned int pci_max_bus = 0xff;
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Read PCI BAR
|
* Read PCI BAR
|
||||||
*
|
*
|
||||||
|
@ -242,13 +233,15 @@ static void unregister_pcidev ( struct pci_device *pci ) {
|
||||||
*/
|
*/
|
||||||
static int pcibus_probe ( struct root_device *rootdev ) {
|
static int pcibus_probe ( struct root_device *rootdev ) {
|
||||||
struct pci_device *pci = NULL;
|
struct pci_device *pci = NULL;
|
||||||
|
unsigned int max_bus;
|
||||||
unsigned int bus;
|
unsigned int bus;
|
||||||
unsigned int devfn;
|
unsigned int devfn;
|
||||||
uint8_t hdrtype;
|
uint8_t hdrtype = 0;
|
||||||
uint32_t tmp;
|
uint32_t tmp;
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
for ( bus = 0 ; bus <= pci_max_bus ; bus++ ) {
|
max_bus = pci_max_bus();
|
||||||
|
for ( bus = 0 ; bus <= max_bus ; bus++ ) {
|
||||||
for ( devfn = 0 ; devfn <= 0xff ; devfn++ ) {
|
for ( devfn = 0 ; devfn <= 0xff ; devfn++ ) {
|
||||||
|
|
||||||
/* Allocate struct pci_device */
|
/* Allocate struct pci_device */
|
||||||
|
|
|
@ -19,6 +19,7 @@
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
#include <gpxe/device.h>
|
#include <gpxe/device.h>
|
||||||
#include <gpxe/tables.h>
|
#include <gpxe/tables.h>
|
||||||
|
#include <pci_io.h>
|
||||||
#include "pci_ids.h"
|
#include "pci_ids.h"
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -318,19 +319,6 @@ struct pci_driver {
|
||||||
.name = _name, \
|
.name = _name, \
|
||||||
}
|
}
|
||||||
|
|
||||||
extern unsigned int pci_max_bus;
|
|
||||||
extern int pci_read_config_byte ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint8_t *value );
|
|
||||||
extern int pci_write_config_byte ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint8_t value );
|
|
||||||
extern int pci_read_config_word ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint16_t *value );
|
|
||||||
extern int pci_write_config_word ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint16_t value );
|
|
||||||
extern int pci_read_config_dword ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint32_t *value );
|
|
||||||
extern int pci_write_config_dword ( struct pci_device *pci, unsigned int where,
|
|
||||||
uint32_t value );
|
|
||||||
extern void adjust_pci_device ( struct pci_device *pci );
|
extern void adjust_pci_device ( struct pci_device *pci );
|
||||||
extern unsigned long pci_bar_start ( struct pci_device *pci,
|
extern unsigned long pci_bar_start ( struct pci_device *pci,
|
||||||
unsigned int reg );
|
unsigned int reg );
|
||||||
|
|
Reference in New Issue