[librm] Generate page tables for 64-bit builds
Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown
parent
d1562c38a6
commit
163f8acba0
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@ -26,6 +26,12 @@ SECTIONS {
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PROVIDE ( _max_align = 16 );
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/*
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* Default to not generating space for page tables
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*
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*/
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PROVIDE ( _use_page_tables = 0 );
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/*
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* Allow decompressor to require a minimum amount of temporary stack
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* space.
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@ -127,6 +133,12 @@ SECTIONS {
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*(COMMON)
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*(.stack)
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*(.stack.*)
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*(.pages)
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*(.pages.*)
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_textdata_paged_len = ABSOLUTE ( . - _textdata );
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_textdata_ptes = ABSOLUTE ( ( _textdata_paged_len + 4095 ) / 4096 );
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_textdata_pdes = ABSOLUTE ( ( _textdata_ptes + 511 ) / 512 );
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. += ( _use_page_tables ? ( _textdata_pdes * 4096 ) : 0 );
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_etextdata = .;
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}
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_textdata_filesz = ABSOLUTE ( _mtextdata ) - ABSOLUTE ( _textdata );
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@ -10,8 +10,38 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
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/* Drag in local definitions */
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#include "librm.h"
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/* For switches to/from protected mode */
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#define CR0_PE 1
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/* CR0: protection enabled */
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#define CR0_PE ( 1 << 0 )
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/* CR0: paging */
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#define CR0_PG ( 1 << 31 )
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/* CR4: physical address extensions */
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#define CR4_PAE ( 1 << 5 )
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/* Page: present */
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#define PG_P 0x01
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/* Page: read/write */
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#define PG_RW 0x02
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/* Page: user/supervisor */
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#define PG_US 0x04
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/* Page: page size */
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#define PG_PS 0x80
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/* Size of various paging-related data structures */
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#define SIZEOF_PTE_LOG2 3
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#define SIZEOF_PTE ( 1 << SIZEOF_PTE_LOG2 )
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#define SIZEOF_PT_LOG2 12
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#define SIZEOF_PT ( 1 << SIZEOF_PT_LOG2 )
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#define SIZEOF_4KB_PAGE_LOG2 12
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#define SIZEOF_4KB_PAGE ( 1 << SIZEOF_4KB_PAGE_LOG2 )
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#define SIZEOF_2MB_PAGE_LOG2 21
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#define SIZEOF_2MB_PAGE ( 1 << SIZEOF_2MB_PAGE_LOG2 )
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#define SIZEOF_LOW_4GB_LOG2 32
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#define SIZEOF_LOW_4GB ( 1 << SIZEOF_LOW_4GB_LOG2 )
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/* Size of various C data structures */
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#define SIZEOF_I386_SEG_REGS 12
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@ -226,6 +256,10 @@ init_librm:
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.if32 ; subl %edi, %eax ; .endif
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movl %eax, rm_data16
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.if64 ; /* Reset page tables, if applicable */
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xorl %eax, %eax
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movl %eax, pml4
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.endif
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/* Switch to protected mode */
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virtcall init_librm_pmode
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.section ".text.init_librm", "ax", @progbits
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@ -242,6 +276,10 @@ init_librm_pmode:
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rep movsl
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popw %ds
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.if64 ; /* Initialise page tables, if applicable */
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movl VIRTUAL(virt_offset), %edi
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call init_pages
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.endif
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/* Return to real mode */
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ret
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.section ".text16.init_librm", "ax", @progbits
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@ -714,3 +752,144 @@ interrupt_wrapper:
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/* Restore registers and return */
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popal
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iret
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/****************************************************************************
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* Page tables
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*
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****************************************************************************
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*/
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.section ".pages", "aw", @nobits
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.align SIZEOF_PT
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/* Page map level 4 entries (PML4Es)
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*
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* This comprises
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*
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* - PML4E[0x000] covering [0x0000000000000000-0x0000007fffffffff]
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* - PML4E[0x1ff] covering [0xffffff8000000000-0xffffffffffffffff]
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*
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* These point to the PDPT. This creates some aliased
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* addresses within unused portions of the 64-bit address
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* space, but allows us to use just a single PDPT.
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*/
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pml4e:
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.space SIZEOF_PT
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.size pml4e, . - pml4e
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/* Page directory pointer table entries (PDPTEs)
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*
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* This comprises:
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*
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* - PDPTE[0x000] covering [0x0000000000000000-0x000000003fffffff]
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* - PDPTE[0x001] covering [0x0000000040000000-0x000000007fffffff]
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* - PDPTE[0x002] covering [0x0000000080000000-0x00000000bfffffff]
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* - PDPTE[0x003] covering [0x00000000c0000000-0x00000000ffffffff]
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*
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* These point to the appropriate page directories (in pde_low)
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* used to identity-map the whole of the 32-bit address space.
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*
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* - PDPTE[0x1ff] covering [0xffffffffc0000000-0xffffffffffffffff]
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*
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* This points back to the PDPT itself, allowing the PDPT to be
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* (ab)used to hold PDEs covering .textdata.
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*
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* - PDE[N-M] covering [_textdata,_end)
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*
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* These are used to point to the page tables (in pte_textdata)
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* used to map our .textdata section. Note that each PDE
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* covers 2MB, so we are likely to use only a single PDE in
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* practice.
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*/
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pdpte:
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.space SIZEOF_PT
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.size pdpte, . - pdpte
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.equ pde_textdata, pdpte /* (ab)use */
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/* Page directory entries (PDEs) for the low 4GB
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*
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* This comprises 2048 2MB pages to identity-map the whole of
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* the 32-bit address space.
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*/
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pde_low:
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.equ PDE_LOW_PTES, ( SIZEOF_LOW_4GB / SIZEOF_2MB_PAGE )
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.equ PDE_LOW_PTS, ( ( PDE_LOW_PTES * SIZEOF_PTE ) / SIZEOF_PT )
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.space ( PDE_LOW_PTS * SIZEOF_PT )
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.size pde_low, . - pde_low
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/* Page table entries (PTEs) for .textdata
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*
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* This comprises enough 4kB pages to map the whole of
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* .textdata. The required number of PTEs is calculated by
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* the linker script.
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*
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* Note that these mappings do not cover the PTEs themselves.
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* This does not matter, since code running with paging
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* enabled never needs to access these PTEs.
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*/
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pte_textdata:
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/* Allocated by linker script; must be at the end of .textdata */
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.section ".bss16.pml4", "aw", @nobits
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pml4: .long 0
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/****************************************************************************
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* init_pages (protected-mode near call)
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*
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* Initialise the page tables ready for long mode.
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*
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* Parameters:
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* %edi : virt_offset
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****************************************************************************
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*/
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.section ".text.init_pages", "ax", @progbits
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.code32
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init_pages:
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/* Initialise PML4Es for low 4GB and negative 2GB */
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leal ( VIRTUAL(pdpte) + ( PG_P | PG_RW | PG_US ) )(%edi), %eax
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movl %eax, VIRTUAL(pml4e)
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movl %eax, ( VIRTUAL(pml4e) + SIZEOF_PT - SIZEOF_PTE )
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/* Initialise PDPTE for negative 1GB */
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movl %eax, ( VIRTUAL(pdpte) + SIZEOF_PT - SIZEOF_PTE )
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/* Initialise PDPTEs for low 4GB */
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movl $PDE_LOW_PTS, %ecx
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leal ( VIRTUAL(pde_low) + ( PDE_LOW_PTS * SIZEOF_PT ) + \
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( PG_P | PG_RW | PG_US ) )(%edi), %eax
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1: subl $SIZEOF_PT, %eax
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movl %eax, ( VIRTUAL(pdpte) - SIZEOF_PTE )(,%ecx,SIZEOF_PTE)
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loop 1b
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/* Initialise PDEs for low 4GB */
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movl $PDE_LOW_PTES, %ecx
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leal ( 0 + ( PG_P | PG_RW | PG_US | PG_PS ) ), %eax
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1: subl $SIZEOF_2MB_PAGE, %eax
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movl %eax, ( VIRTUAL(pde_low) - SIZEOF_PTE )(,%ecx,SIZEOF_PTE)
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loop 1b
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/* Initialise PDEs for .textdata */
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movl $_textdata_pdes, %ecx
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leal ( VIRTUAL(_etextdata) + ( PG_P | PG_RW | PG_US ) )(%edi), %eax
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movl $VIRTUAL(_textdata), %ebx
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shrl $( SIZEOF_2MB_PAGE_LOG2 - SIZEOF_PTE_LOG2 ), %ebx
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andl $( SIZEOF_PT - 1 ), %ebx
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1: subl $SIZEOF_PT, %eax
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movl %eax, (VIRTUAL(pde_textdata) - SIZEOF_PTE)(%ebx,%ecx,SIZEOF_PTE)
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loop 1b
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/* Initialise PTEs for .textdata */
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movl $_textdata_ptes, %ecx
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leal ( VIRTUAL(_textdata) + ( PG_P | PG_RW | PG_US ) )(%edi), %eax
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addl $_textdata_paged_len, %eax
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1: subl $SIZEOF_4KB_PAGE, %eax
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movl %eax, ( VIRTUAL(pte_textdata) - SIZEOF_PTE )(,%ecx,SIZEOF_PTE)
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loop 1b
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/* Record PML4 physical address */
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leal VIRTUAL(pml4e)(%edi), %eax
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movl VIRTUAL(data16), %ebx
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subl %edi, %ebx
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movl %eax, pml4(%ebx)
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/* Return */
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ret
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@ -9,6 +9,10 @@ LDFLAGS += --section-start=.textdata=0xffffffffeb000000
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#
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CFLAGS += -mno-red-zone
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# Generate extra space for page tables to cover .textdata
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#
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LDFLAGS += --defsym=_use_page_tables=1
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# Include generic BIOS Makefile
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#
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MAKEDEPS += arch/x86/Makefile.pcbios
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