[timer] Rewrite the 8254 Programmable Interval Timer support
The 8254 timer code (used to implement udelay()) has an unknown provenance. Rewrite this code to avoid potential licensing uncertainty. Signed-off-by: Michael Brown <mcb30@ipxe.org>
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@ -27,7 +27,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
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#include <assert.h>
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#include <ipxe/timer.h>
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#include <ipxe/timer2.h>
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#include <ipxe/pit8254.h>
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/**
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* Number of TSC ticks per microsecond
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@ -56,10 +56,10 @@ static void rdtsc_udelay ( unsigned long usecs ) {
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elapsed = ( currticks() - start );
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} while ( elapsed < ( usecs * rdtsc_ticks_per_usec ) );
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} else {
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/* Not yet calibrated; use timer2 and calibrate
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/* Not yet calibrated; use 8254 PIT and calibrate
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* based on result.
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*/
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timer2_udelay ( usecs );
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pit8254_udelay ( usecs );
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elapsed = ( currticks() - start );
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rdtsc_ticks_per_usec = ( elapsed / usecs );
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DBG ( "RDTSC timer calibrated: %ld ticks in %ld usecs "
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@ -1,87 +0,0 @@
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/*
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* arch/i386/core/i386_timer.c
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*
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* Use the "System Timer 2" to implement the udelay callback in
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* the BIOS timer driver. Also used to calibrate the clock rate
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* in the RTDSC timer driver.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2, or (at
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* your option) any later version.
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*/
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FILE_LICENCE ( GPL2_OR_LATER );
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#include <stddef.h>
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#include <ipxe/timer2.h>
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#include <ipxe/io.h>
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/* Timers tick over at this rate */
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#define TIMER2_TICKS_PER_SEC 1193180U
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/* Parallel Peripheral Controller Port B */
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#define PPC_PORTB 0x61
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/* Meaning of the port bits */
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#define PPCB_T2OUT 0x20 /* Bit 5 */
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#define PPCB_SPKR 0x02 /* Bit 1 */
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#define PPCB_T2GATE 0x01 /* Bit 0 */
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/* Ports for the 8254 timer chip */
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#define TIMER2_PORT 0x42
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#define TIMER_MODE_PORT 0x43
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/* Meaning of the mode bits */
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#define TIMER0_SEL 0x00
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#define TIMER1_SEL 0x40
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#define TIMER2_SEL 0x80
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#define READBACK_SEL 0xC0
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#define LATCH_COUNT 0x00
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#define LOBYTE_ACCESS 0x10
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#define HIBYTE_ACCESS 0x20
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#define WORD_ACCESS 0x30
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#define MODE0 0x00
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#define MODE1 0x02
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#define MODE2 0x04
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#define MODE3 0x06
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#define MODE4 0x08
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#define MODE5 0x0A
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#define BINARY_COUNT 0x00
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#define BCD_COUNT 0x01
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static void load_timer2 ( unsigned int ticks ) {
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/*
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* Now let's take care of PPC channel 2
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*
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* Set the Gate high, program PPC channel 2 for mode 0,
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* (interrupt on terminal count mode), binary count,
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* load 5 * LATCH count, (LSB and MSB) to begin countdown.
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*
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* Note some implementations have a bug where the high bits byte
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* of channel 2 is ignored.
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*/
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/* Set up the timer gate, turn off the speaker */
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/* Set the Gate high, disable speaker */
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outb((inb(PPC_PORTB) & ~PPCB_SPKR) | PPCB_T2GATE, PPC_PORTB);
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/* binary, mode 0, LSB/MSB, Ch 2 */
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outb(TIMER2_SEL|WORD_ACCESS|MODE0|BINARY_COUNT, TIMER_MODE_PORT);
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/* LSB of ticks */
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outb(ticks & 0xFF, TIMER2_PORT);
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/* MSB of ticks */
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outb(ticks >> 8, TIMER2_PORT);
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}
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static int timer2_running ( void ) {
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return ((inb(PPC_PORTB) & PPCB_T2OUT) == 0);
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}
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void timer2_udelay ( unsigned long usecs ) {
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load_timer2 ( ( usecs * TIMER2_TICKS_PER_SEC ) / ( 1000 * 1000 ) );
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while (timer2_running()) {
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/* Do nothing */
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}
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}
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@ -15,7 +15,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
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#define TIMER_PREFIX_pcbios __pcbios_
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#endif
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#include <ipxe/timer2.h>
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#include <ipxe/pit8254.h>
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/**
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* Delay for a fixed number of microseconds
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@ -25,9 +25,9 @@ FILE_LICENCE ( GPL2_OR_LATER );
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static inline __always_inline void
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TIMER_INLINE ( pcbios, udelay ) ( unsigned long usecs ) {
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/* BIOS timer is not high-resolution enough for udelay(), so
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* we use timer2
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* we use the 8254 Programmable Interval Timer.
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*/
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timer2_udelay ( usecs );
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pit8254_udelay ( usecs );
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}
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/**
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@ -1,14 +0,0 @@
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#ifndef _IPXE_TIMER2_H
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#define _IPXE_TIMER2_H
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/** @file
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*
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* Timer chip control
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER );
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extern void timer2_udelay ( unsigned long usecs );
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#endif /* _IPXE_TIMER2_H */
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@ -0,0 +1,66 @@
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/*
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* Copyright (C) 2015 Michael Brown <mbrown@fensystems.co.uk>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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FILE_LICENCE ( GPL2_OR_LATER );
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#include <assert.h>
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#include <ipxe/io.h>
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#include <ipxe/pit8254.h>
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/** @file
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*
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* 8254 Programmable Interval Timer
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*
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*/
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/**
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* Delay for a fixed number of timer ticks using the speaker channel
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*
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* @v ticks Number of timer ticks for which to delay
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*/
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void pit8254_speaker_delay ( unsigned int ticks ) {
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uint8_t spkr;
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uint8_t cmd;
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uint8_t low;
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uint8_t high;
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/* Sanity check */
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assert ( ticks <= 0xffff );
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/* Disable speaker, set speaker channel gate input high */
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spkr = inb ( PIT8254_SPKR );
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spkr &= ~PIT8254_SPKR_ENABLE;
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spkr |= PIT8254_SPKR_GATE;
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outb ( spkr, PIT8254_SPKR );
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/* Program speaker channel to "interrupt" on terminal count */
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cmd = ( PIT8254_CMD_CHANNEL ( PIT8254_CH_SPKR ) |
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PIT8254_CMD_ACCESS_LOHI | PIT8254_CMD_OP_TERMINAL |
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PIT8254_CMD_BINARY );
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low = ( ( ticks >> 0 ) & 0xff );
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high = ( ( ticks >> 8 ) & 0xff );
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outb ( cmd, PIT8254_CMD );
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outb ( low, PIT8254_DATA ( PIT8254_CH_SPKR ) );
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outb ( high, PIT8254_DATA ( PIT8254_CH_SPKR ) );
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/* Wait for channel to "interrupt" */
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do {
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spkr = inb ( PIT8254_SPKR );
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} while ( ! ( spkr & PIT8254_SPKR_OUT ) );
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}
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@ -0,0 +1,81 @@
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#ifndef _IPXE_PIT8254_H
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#define _IPXE_PIT8254_H
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/** @file
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*
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* 8254 Programmable Interval Timer
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER );
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/** IRQ0 channel */
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#define PIT8254_CH_IRQ0 0
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/** PC speaker channel */
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#define PIT8254_CH_SPKR 2
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/** Timer frequency (1.193182MHz) */
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#define PIT8254_HZ 1193182UL
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/** Data port */
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#define PIT8254_DATA(channel) ( 0x40 + (channel) )
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/** Mode/command register */
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#define PIT8254_CMD 0x43
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/** Select channel */
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#define PIT8254_CMD_CHANNEL(channel) ( (channel) << 6 )
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/** Access modes */
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#define PIT8254_CMD_ACCESS_LATCH 0x00 /**< Latch count value command */
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#define PIT8254_CMD_ACCESS_LO 0x10 /**< Low byte only */
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#define PIT8254_CMD_ACCESS_HI 0x20 /**< High byte only */
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#define PIT8254_CMD_ACCESS_LOHI 0x30 /**< Low-byte, high-byte pair */
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/* Operating modes */
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#define PIT8254_CMD_OP_TERMINAL 0x00 /**< Interrupt on terminal count */
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#define PIT8254_CMD_OP_ONESHOT 0x02 /**< Hardware re-triggerable one-shot */
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#define PIT8254_CMD_OP_RATE 0x04 /**< Rate generator */
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#define PIT8254_CMD_OP_SQUARE 0x06 /**< Square wave generator */
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#define PIT8254_CMD_OP_SWSTROBE 0x08 /**< Software triggered strobe */
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#define PIT8254_CMD_OP_HWSTROBE 0x0a /**< Hardware triggered strobe */
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#define PIT8254_CMD_OP_RATE2 0x0c /**< Rate generator (duplicate) */
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#define PIT8254_CMD_OP_SQUARE2 0x0e /**< Square wave generator (duplicate)*/
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/** Binary mode */
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#define PIT8254_CMD_BINARY 0x00
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/** BCD mode */
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#define PIT8254_CMD_BCD 0x01
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/** PC speaker control register */
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#define PIT8254_SPKR 0x61
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/** PC speaker channel gate */
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#define PIT8254_SPKR_GATE 0x01
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/** PC speaker enabled */
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#define PIT8254_SPKR_ENABLE 0x02
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/** PC speaker channel output */
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#define PIT8254_SPKR_OUT 0x20
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extern void pit8254_speaker_delay ( unsigned int ticks );
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/**
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* Delay for a fixed number of microseconds
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*
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* @v usecs Number of microseconds for which to delay
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*/
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static inline __attribute__ (( always_inline )) void
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pit8254_udelay ( unsigned long usecs ) {
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/* Delays are invariably compile-time constants; force the
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* multiplication and division to take place at compilation
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* time rather than runtime.
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*/
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pit8254_speaker_delay ( ( usecs * PIT8254_HZ ) / 1000000 );
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}
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#endif /* _IPXE_PIT8254_H */
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