310 lines
8.5 KiB
C
310 lines
8.5 KiB
C
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#ifndef _SMSC75XX_H
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#define _SMSC75XX_H
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/** @file
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*
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* SMSC LAN75xx USB Ethernet driver
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <ipxe/usb.h>
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#include <ipxe/usbnet.h>
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#include <ipxe/if_ether.h>
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#include <ipxe/mii.h>
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/** Register write command */
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#define SMSC75XX_REGISTER_WRITE \
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( USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE | \
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USB_REQUEST_TYPE ( 0xa0 ) )
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/** Register read command */
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#define SMSC75XX_REGISTER_READ \
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( USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE | \
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USB_REQUEST_TYPE ( 0xa1 ) )
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/** Get statistics command */
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#define SMSC75XX_GET_STATISTICS \
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( USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE | \
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USB_REQUEST_TYPE ( 0xa2 ) )
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/** Interrupt status register */
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#define SMSC75XX_INT_STS 0x00c
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#define SMSC75XX_INT_STS_RDFO_INT 0x00400000UL /**< RX FIFO overflow */
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#define SMSC75XX_INT_STS_PHY_INT 0x00020000UL /**< PHY interrupt */
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/** Hardware configuration register */
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#define SMSC75XX_HW_CFG 0x010
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#define SMSC75XX_HW_CFG_BIR 0x00000080UL /**< Bulk IN use NAK */
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#define SMSC75XX_HW_CFG_LRST 0x00000002UL /**< Soft lite reset */
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/** Interrupt endpoint control register */
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#define SMSC75XX_INT_EP_CTL 0x038
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#define SMSC75XX_INT_EP_CTL_RDFO_EN 0x00400000UL /**< RX FIFO overflow */
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#define SMSC75XX_INT_EP_CTL_PHY_EN 0x00020000UL /**< PHY interrupt */
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/** Bulk IN delay register */
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#define SMSC75XX_BULK_IN_DLY 0x03c
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#define SMSC75XX_BULK_IN_DLY_SET(ticks) ( (ticks) << 0 ) /**< Delay / 16.7ns */
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/** EEPROM command register */
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#define SMSC75XX_E2P_CMD 0x040
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#define SMSC75XX_E2P_CMD_EPC_BSY 0x80000000UL /**< EPC busy */
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#define SMSC75XX_E2P_CMD_EPC_CMD_READ 0x00000000UL /**< READ command */
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#define SMSC75XX_E2P_CMD_EPC_ADDR(addr) ( (addr) << 0 ) /**< EPC address */
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/** EEPROM data register */
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#define SMSC75XX_E2P_DATA 0x044
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#define SMSC75XX_E2P_DATA_GET(e2p_data) \
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( ( (e2p_data) >> 0 ) & 0xff ) /**< EEPROM data */
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/** MAC address EEPROM address */
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#define SMSC75XX_EEPROM_MAC 0x01
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/** Receive filtering engine control register */
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#define SMSC75XX_RFE_CTL 0x060
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#define SMSC75XX_RFE_CTL_AB 0x00000400UL /**< Accept broadcast */
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#define SMSC75XX_RFE_CTL_AM 0x00000200UL /**< Accept multicast */
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#define SMSC75XX_RFE_CTL_AU 0x00000100UL /**< Accept unicast */
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/** FIFO controller RX FIFO control register */
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#define SMSC75XX_FCT_RX_CTL 0x090
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#define SMSC75XX_FCT_RX_CTL_EN 0x80000000UL /**< FCT RX enable */
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#define SMSC75XX_FCT_RX_CTL_BAD 0x02000000UL /**< Store bad frames */
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/** FIFO controller TX FIFO control register */
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#define SMSC75XX_FCT_TX_CTL 0x094
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#define SMSC75XX_FCT_TX_CTL_EN 0x80000000UL /**< FCT TX enable */
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/** MAC receive register */
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#define SMSC75XX_MAC_RX 0x104
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#define SMSC75XX_MAC_RX_MAX_SIZE(mtu) ( (mtu) << 16 ) /**< Max frame size */
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#define SMSC75XX_MAC_RX_MAX_SIZE_DEFAULT \
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SMSC75XX_MAC_RX_MAX_SIZE ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )
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#define SMSC75XX_MAC_RX_FCS 0x00000010UL /**< FCS stripping */
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#define SMSC75XX_MAC_RX_EN 0x00000001UL /**< RX enable */
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/** MAC transmit register */
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#define SMSC75XX_MAC_TX 0x108
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#define SMSC75XX_MAC_TX_EN 0x00000001UL /**< TX enable */
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/** MAC receive address high register */
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#define SMSC75XX_RX_ADDRH 0x118
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/** MAC receive address low register */
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#define SMSC75XX_RX_ADDRL 0x11c
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/** MII access register */
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#define SMSC75XX_MII_ACCESS 0x120
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#define SMSC75XX_MII_ACCESS_PHY_ADDRESS 0x00000800UL /**< PHY address */
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#define SMSC75XX_MII_ACCESS_MIIRINDA(addr) ( (addr) << 6 ) /**< MII register */
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#define SMSC75XX_MII_ACCESS_MIIWNR 0x00000002UL /**< MII write */
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#define SMSC75XX_MII_ACCESS_MIIBZY 0x00000001UL /**< MII busy */
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/** MII data register */
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#define SMSC75XX_MII_DATA 0x124
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#define SMSC75XX_MII_DATA_SET(data) ( (data) << 0 ) /**< Set data */
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#define SMSC75XX_MII_DATA_GET(mii_data) \
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( ( (mii_data) >> 0 ) & 0xffff ) /**< Get data */
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/** PHY interrupt source MII register */
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#define SMSC75XX_MII_PHY_INTR_SOURCE 29
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/** PHY interrupt mask MII register */
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#define SMSC75XX_MII_PHY_INTR_MASK 30
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/** PHY interrupt: auto-negotiation complete */
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#define SMSC75XX_PHY_INTR_ANEG_DONE 0x0040
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/** PHY interrupt: link down */
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#define SMSC75XX_PHY_INTR_LINK_DOWN 0x0010
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/** MAC address perfect filter N high register */
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#define SMSC75XX_ADDR_FILTH(n) ( 0x300 + ( 8 * (n) ) )
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#define SMSC75XX_ADDR_FILTH_VALID 0x80000000UL /**< Address valid */
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/** MAC address perfect filter N low register */
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#define SMSC75XX_ADDR_FILTL(n) ( 0x304 + ( 8 * (n) ) )
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/** MAC address */
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union smsc75xx_mac {
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/** MAC receive address registers */
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struct {
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/** MAC receive address low register */
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uint32_t l;
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/** MAC receive address high register */
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uint32_t h;
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} __attribute__ (( packed )) addr;
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/** Raw MAC address */
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uint8_t raw[ETH_ALEN];
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};
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/** Receive packet header */
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struct smsc75xx_rx_header {
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/** RX command word */
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uint32_t command;
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/** VLAN tag */
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uint16_t vtag;
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/** Checksum */
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uint16_t csum;
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/** Two-byte padding used to align Ethernet payload */
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uint16_t pad;
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} __attribute__ (( packed ));
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/** Receive error detected */
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#define SMSC75XX_RX_RED 0x00400000UL
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/** Transmit packet header */
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struct smsc75xx_tx_header {
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/** TX command word */
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uint32_t command;
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/** VLAN tag */
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uint16_t tag;
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/** Maximum segment size */
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uint16_t mss;
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} __attribute__ (( packed ));
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/** Insert frame checksum and pad */
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#define SMSC75XX_TX_FCS 0x00400000UL
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/** Interrupt packet format */
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struct smsc75xx_interrupt {
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/** Current value of INT_STS register */
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uint32_t int_sts;
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} __attribute__ (( packed ));
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/** Byte count statistics */
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struct smsc75xx_byte_statistics {
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/** Unicast byte count */
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uint32_t unicast;
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/** Broadcast byte count */
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uint32_t broadcast;
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/** Multicast byte count */
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uint32_t multicast;
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} __attribute__ (( packed ));
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/** Frame count statistics */
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struct smsc75xx_frame_statistics {
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/** Unicast frames */
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uint32_t unicast;
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/** Broadcast frames */
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uint32_t broadcast;
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/** Multicast frames */
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uint32_t multicast;
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/** Pause frames */
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uint32_t pause;
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/** Frames by length category */
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uint32_t len[7];
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} __attribute__ (( packed ));
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/** Receive error statistics */
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struct smsc75xx_rx_error_statistics {
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/** FCS errors */
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uint32_t fcs;
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/** Alignment errors */
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uint32_t alignment;
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/** Fragment errors */
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uint32_t fragment;
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/** Jabber errors */
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uint32_t jabber;
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/** Undersize frame errors */
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uint32_t undersize;
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/** Oversize frame errors */
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uint32_t oversize;
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/** Dropped frame errors */
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uint32_t dropped;
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} __attribute__ (( packed ));
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/** Receive statistics */
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struct smsc75xx_rx_statistics {
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/** Error statistics */
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struct smsc75xx_rx_error_statistics err;
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/** Byte count statistics */
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struct smsc75xx_byte_statistics byte;
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/** Frame count statistics */
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struct smsc75xx_frame_statistics frame;
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} __attribute__ (( packed ));
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/** Transmit error statistics */
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struct smsc75xx_tx_error_statistics {
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/** FCS errors */
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uint32_t fcs;
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/** Excess deferral errors */
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uint32_t deferral;
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/** Carrier errors */
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uint32_t carrier;
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/** Bad byte count */
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uint32_t count;
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/** Single collisions */
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uint32_t single;
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/** Multiple collisions */
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uint32_t multiple;
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/** Excession collisions */
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uint32_t excessive;
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/** Late collisions */
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uint32_t late;
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} __attribute__ (( packed ));
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/** Transmit statistics */
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struct smsc75xx_tx_statistics {
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/** Error statistics */
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struct smsc75xx_tx_error_statistics err;
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/** Byte count statistics */
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struct smsc75xx_byte_statistics byte;
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/** Frame count statistics */
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struct smsc75xx_frame_statistics frame;
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} __attribute__ (( packed ));
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/** Statistics */
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struct smsc75xx_statistics {
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/** Receive statistics */
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struct smsc75xx_rx_statistics rx;
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/** Transmit statistics */
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struct smsc75xx_tx_statistics tx;
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} __attribute__ (( packed ));
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/** A SMSC75xx network device */
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struct smsc75xx_device {
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/** USB device */
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struct usb_device *usb;
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/** USB bus */
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struct usb_bus *bus;
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/** Network device */
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struct net_device *netdev;
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/** USB network device */
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struct usbnet_device usbnet;
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/** MII interface */
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struct mii_interface mii;
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/** Interrupt status */
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uint32_t int_sts;
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};
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/** Reset delay (in microseconds) */
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#define SMSC75XX_RESET_DELAY_US 2
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/** Maximum time to wait for EEPROM (in milliseconds) */
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#define SMSC75XX_EEPROM_MAX_WAIT_MS 100
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/** Maximum time to wait for MII (in milliseconds) */
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#define SMSC75XX_MII_MAX_WAIT_MS 100
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/** Interrupt maximum fill level
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*
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* This is a policy decision.
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*/
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#define SMSC75XX_INTR_MAX_FILL 2
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/** Bulk IN maximum fill level
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*
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* This is a policy decision.
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*/
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#define SMSC75XX_IN_MAX_FILL 8
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/** Bulk IN buffer size */
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#define SMSC75XX_IN_MTU \
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( sizeof ( struct smsc75xx_rx_header ) + \
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ETH_FRAME_LEN + 4 /* possible VLAN header */ )
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#endif /* _SMSC75XX_H */
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